ATtiny167-ESSZ datasheet(255/282 Pages) ATMEL

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255

7728D–AVR–07/09

ATtiny87/ATtiny167

23. Decoupling Capacitors

The operating frequency (i.e. system clock) of the processor determines in 95% of cases the

value needed for microcontroller decoupling capacitors.

The hypotheses used as first evaluation for decoupling capacitors are:

• The operating frequency (

fop) supplies itself the maximum peak levels of noise. The main

peaks are located at

fop and 2

• fop.

• An SMC capacitor connected to 2 micro-vias on a PCB has the following characteristics:

– 1.5 nH from the connection of the capacitor to the PCB,

– 1.5 nH from the capacitor intrinsic inductance.

Figure 23-1. Capacitor description

According to the operating frequency of the product, the decoupling capacitances are chosen

considering the frequencies to filter,

fop and 2

• fop.

The relation between frequencies to cut and decoupling characteristics are defined by:

and

where:

– L: the inductance equivalent to the global inductance on the Vcc/Gnd lines.

–C

1 & C2: decoupling capacitors (C1 = 4 • C2).

Then, in normalized value range, the decoupling capacitors become:

These decoupling capacitors must to be implemented as close as possible to each pair of

power supply pins:

– 16-17 for logic sub-system,

– 5-6 for analogical sub-system.

Nevertheless, a bulk capacitor of 10-47 µF is also needed on the power distribution network of

the PCB, near the power source.

For further information, please refer to Application Notes AVR040 “EMC Design Consider-

ations“ and AVR042 “Hardware Design Considerations“ on the Atmel web site.

Table 23-1.

Decoupling Capacitors vs. Frequency

fop , operating frequency

16 MHz

33 nF

10 nF

12 MHz

56 nF

15 nF

10 MHz

82 nF

22 nF

8 MHz

120 nF

33 nF

6 MHz

220 nF

56 nF

4 MHz

560 nF

120 nF

PCB

Capacitor

1.5 nH

0.75 nH

fop

Π LC

-----------------------

fop

•

Π LC

-----------------------

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