TMP86CS64AFG datasheet(160/202 Pages) TOSHIBA

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15. Synchronous Serial Interface (SIO1)

15.6 Transfer Mode

TMP86CS64AFG

An INTSIO1 interrupt is generated when the specified number of words has been transferred. If the number of

words is to be changed during transfer, the serial interface must be stopped before making the change. The number of

words can be changed during automatic-wait operation of an internal clock. In this case, the serial interface is not

required to be stopped.

Figure 15-6 Number of words to transfer (Example: 1word = 4bit)

15.6 Transfer Mode

SIO1CR1<SIOM> is used to select the transmit, receive, or transmit/receive mode.

15.6.1 4-bit and 8-bit transfer modes

In these modes, firstly set the SIO control register to the transmit mode, and then write first transmit data

(number of transfer words to be transferred) to the data buffer registers (DBR).

After the data are written, the transmission is started by setting SIO1CR1<SIOS> to “1”. The data are then

output sequentially to the SO pin in synchronous with the serial clock, starting with the least significant bit

(LSB). As soon as the LSB has been output, the data are transferred from the data buffer register to the shift

empty) interrupt is generated to request the next transmitted data.

When the internal clock is used, the serial clock will stop and an automatic-wait will be initiated if the next

transmitted data are not loaded to the data buffer register by the time the number of data words specified with

the SIO1CR2<BUF> has been transmitted. Writing even one word of data cancels the automatic-wait; there-

fore, when transmitting two or more words, always write the next word before transmission of the previous

word is completed.

Note:Automatic waits are also canceled by writing to a DBR not being used as a transmit data buffer register; there-

fore, during SIO do not use such DBR for other applications. For example, when 3 words are transmitted, do

not use the DBR of the remained 5 words.

(a) 1 word transmit

(b) 3 words transmit

SO1 pin

INTSIO1 interrupt

SO1 pin

SI1 pin

SCK1 pin

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