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SC16C852LIB датащи(PDF) 30 Page - NXP Semiconductors |
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SC16C852LIB датащи(HTML) 30 Page - NXP Semiconductors |
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30 / 60 page ![]() SC16C852L_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 25 January 2007 30 of 60 NXP Semiconductors SC16C852L 1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. Table 21. Modem Control Register bits description Bit Symbol Description 7 MCR[7] Clock select logic 0 = divide-by-1 clock input logic 1 = divide-by-4 clock input 6 MCR[6] IR enable (see Figure 29). logic 0 = enable the standard modem receive and transmit input/output interface (normal default condition) logic 1 = enable infrared IrDA receive and transmit inputs/outputs. While in this mode, the TX/RX output/inputs are routed to the infrared encoder/decoder. The data input and output levels will conform to the IrDA infrared interface requirement. As such, while in this mode, the infrared TX output will be a logic 0 during idle data conditions. 5 MCR[5] Reserved; set to ‘0’. 4 MCR[4] Loopback. Enable the local loopback mode (diagnostics). In this mode the transmitter output (TX) and the receiver input (RX), CTS, DSR, CD, and RI are disconnected from the SC16C852L I/O pins. Internally the modem data and control pins are connected into a loopback data configuration (see Figure 8). In this mode, the receiver and transmitter interrupts remain fully operational. The Modem Control Interrupts are also operational, but the interrupts’ sources are switched to the lower four bits of the Modem Control. Interrupts continue to be controlled by the IER register. logic 0 = disable Loopback mode (normal default condition) logic 1 = enable local Loopback mode (diagnostics) 3 MCR[3] OP2A/OP2B, INT enable logic 0 = forces INT (A, B) outputs to the 3-state mode and sets OP2A/OP2B to a logic 1 (normal default condition) logic 1 = forces the INT (A, B) outputs to the active mode and sets OP2A/OP2B to a logic 0 Remark: OP2A/OP2B pins do not exist on the HVQFN32 package. 2 MCR[2] OP1A/OP1B are not available as an external signal in the SC16C852L. This bit is instead used in the Loopback mode only. In the Loopback mode, this bit is used to write the state of the modem RI interface signal. 1 MCR[1] RTS logic 0 = force RTS output to a logic 1 (normal default condition) logic 1 = force RTS output to a logic 0 0 MCR[0] DTR logic 0 = force DTR output to a logic 1 (normal default condition) logic 1 = force DTR output to a logic 0 |
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