SC16C852LIB datasheet(11/60 Pages) PHILIPS

11 / 60 page

SC16C852L_2

Product data sheet

Rev. 02 — 25 January 2007

11 of 60

NXP Semiconductors

SC16C852L

1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder

6.2 Extended mode (128-byte FIFO)

The device is in the extended mode when any of these four registers contains any value

other than 0: FLWCNTH, FLWCNTL, TXINTLVL, RXINTLVL.

6.3 Internal registers

The SC16C852L provides two sets of internal registers (A and B) consisting of

25 registers each for monitoring and controlling the functions of each channel of the

UART. These registers are shown in Table 5.

Table 4.

Serial port selection (Motorola interface)

H = HIGH; L = LOW.

Chip Select

Function

CS = H

none

CS = L, A3 = L

UART channel A

CS = L, A3 = H

UART channel B

Table 5.

Internal registers decoding

Read mode

Write mode

General register set (THR/RHR, IER/ISR, MCR/MSR, FCR, LSR, SPR)[1]

Receive Holding Register

Transmit Holding Register

Interrupt Enable Register

Interrupt Status Register

FIFO Control Register

Line Control Register

Modem Control Register

Line Status Register

Extra Feature Control Register (EFCR)

Modem Status Register

n/a

Scratchpad Register

Baud rate register set (DLL/DLM)[2]

LSB of Divisor Latch

MSB of Divisor Latch

Second special register set (TXLVLCNT/RXLVLCNT)[3]

Transmit FIFO Level Count

n/a

Receive FIFO Level Count

n/a

Enhanced feature register set (EFR, Xon1/Xon2, Xoff1/Xoff2)[4]

Enhanced Feature Register

Xon1 word

Xon2 word

Xoff1 word

Xoff2 word

First extra feature register set (TXINTLVL/RXINTLVL, FLWCNTH/FLWCNTL)[5]

Transmit FIFO Interrupt Level

Receive FIFO Interrupt Level

Flow Control Count High

Flow Control Count Low

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