SC16C852LIB datasheet(19/60 Pages) PHILIPS

19 / 60 page

SC16C852L_2

Product data sheet

Rev. 02 — 25 January 2007

19 of 60

NXP Semiconductors

SC16C852L

1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder

6.12 Sleep mode

Sleep mode is an enhanced feature of the SC16C852L UART. It is enabled when EFR[4],

the enhanced functions bit, is set and when IER[4] of both channels are set.

6.12.1 Conditions to enter Sleep mode

Sleep mode is entered when:

• Modem input pins are not toggling.

• The serial data input line, RXA or RXB, is idle for 4 character time (logic HIGH) and

AFCR1[4] is logic 0. When AFCR1[4] is logic 1 the device will go to sleep regardless

of the state of the RXA/RXB pin (see Section 7.21 for the description of AFCR1 bit 4).

• The TX FIFO and TX shift register are empty.

• There are no interrupts pending.

• The RX FIFO is empty.

In Sleep mode, the UART clock and baud rate clock are stopped. Since most registers are

clocked using these clocks, the power consumption is greatly reduced.

Remark: Writing to the divisor latches, DLL and DLM, to set the baud clock, must not be

done during Sleep mode. Therefore, it is advisable to disable Sleep mode using IER[4]

before writing to DLL or DLM.

6.12.2 Conditions to resume normal operation

SC16C852L resumes normal operation by any of the following:

• Receives a start bit on RXA/RXB pin.

• Data is loaded into transmit FIFO.

• A change of state on any of the modem input pins

If the device is awakened by one of the conditions described above, it will return to the

Sleep mode automatically after all the conditions described in Section 6.12.1 are met. The

device will stay in Sleep mode until it is disabled by setting any channel’s IER bit 4 to a

logic 0.

When the SC16C852L is in Sleep mode and the host data bus (D[7:0], A[2:0], IOW, IOR,

CSA, CSB) remains in steady state, either HIGH or LOW, the Sleep mode supply current

will be in the

µA range as speciﬁed in Table 38 “Static characteristics”. If any of these

signals is toggling or ﬂoating then the sleep current will be higher.

6.13 Low power feature

A Low power feature is provided by the SC16C852L to prevent the switching of the host

data bus from inﬂuencing the sleep current. When the pin LOWPWR is activated (logic

HIGH), the device immediately and unconditionally goes into Low power mode. All clocks

are stopped and most host interface pins are isolated to reduce power consumption. The

device only returns to normal mode when the LOWPWR pin is de-asserted. The pin can

be left unconnected because it has an internal pull-down resistor.

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