CS47L35 datasheet(166/300 Pages) CIRRUS

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DS1085F3

CS47L35

4.14 General-Purpose I/O

Table 4-83. GPIO Control

Bit

Label

Default

Description

R5888 (0x1700)

GPIO1_CTRL_1

R5918 (0x171E)

GPIO16_CTRL_1

GPn_LVL

See

Footnote 2

GPIOn level. Write to this bit to set a GPIO output. Read from this bit to read GPIO

input level.

For output functions only, if GPn_POL is set, the GPn_LVL bit is the opposite logic

level to the external pin.

Note that, if GPn_DIR = 0, the GPn_LVL bit is write-only.

GPn_OP_CFG

GPIOn Output Configuration

0 = CMOS

1 = Open drain

Note that, if GPn_FN = 0x000 or 0x002, this bit has no effect on the GPIOn output.

If GPn_FN = 0x000, the pin configuration is set according to the applicable

pin-specific function (see Table 4-85). If GPn_FN = 0x002, the pin configuration is

CMOS.

GPn_DB

GPIOn Input Debounce

0 = Disabled

1 = Enabled

GPn_POL

GPIOn Output Polarity Select

0 = Noninverted (Active High)

1 = Inverted (Active Low)

Note that, if GPn_FN = 0x000 or 0x002, this bit has no effect on the GPIOn output.

8:0 GPn_FN[8:0]

0x001

GPIOn Pin Function

(see Table 4-84 for details)

R5889 (0x1701)

GPIO1_CTRL_2

R5919 (0x171F)

GPIO16_CTRL_2

GPn_DIR

GPIOn Pin Direction

0 = Output

1 = Input

The GPn_DIR bit has no effect if GPn_FN = 0x000 or 0x002. If GPn_FN = 0x000,

the pin direction is set according to the applicable pin-specific function (see

Table 4-85). If GPn_FN = 0x002, the pin direction is set according to the DSP GPIO

configuration.

GPn_PU

GPIOn Pull-Up Enable

0 = Disabled

1 = Enabled

Note: If GPn_PD and GPn_PU are both set, a bus keeper function is enabled on

the respective GPIOn pin.

GPn_PD

GPIOn Pull-Down Enable

0 = Disabled

1 = Enabled

Note: If GPn_PD and GPn_PU are both set, a bus keeper function is enabled on

the respective GPIOn pin.

R6848 (0x1AC0)

GPIO_Debounce_

Config

3:0 GP_DBTIME[3:0]

0000

GPIO Input debounce time

0x0 = 100

s

0x1 = 1.5 ms

0x2 = 3 ms

0x3 = 6 ms

0x4 = 12 ms

0x5 = 24 ms

0x6 = 48 ms

0x7 = 96 ms

0x8 = 192 ms

0x9 = 384 ms

0xA = 768 ms

0xB to 0xF = Reserved

1. n is a number (1–16) that identifies the individual GPIO.

2. The default value of GPn_LVL depends upon whether the pin is actively driven by another device. If the pin is actively driven, the bus keeper

maintains this logic level. If the pin is not actively driven, the bus keeper may establish either a Logic 1 or Logic 0 as the initial input level.

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