CS47L35 datasheet(119/300 Pages) CIRRUS

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DS1085F3

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CS47L35

4.7 Digital Audio Interface Control

The AIF3 signal-path-enable bits are described in Table 4-40.

4.7.5

AIF BCLK and LRCLK Control

The AIFnBCLK frequency is selected using the AIFn_BCLK_FREQ field. For each setting of this field, the actual frequency

depends on whether AIFn is configured for a 48-kHz-related sample rate (SAMPLE_RATE_n = 01XXX or 10XXX) or a

44.1kHz-related sample rate (SAMPLE_RATE_n = 10XXX), as described in Table 4-41 through Table 4-43.

The selected AIFnBCLK rate must be less than or equal to SYSCLK/2. See Section 4.16 for details of SYSCLK clock

domain, and the associated control registers.

The AIFnLRCLK frequency is controlled relative to AIFnBCLK by the AIFn_BCPF divider.

Note that the BCLK rate must be configured in master or slave modes, using the AIFn_BCLK_FREQ fields. The LRCLK

rates only require to be configured in Master Mode.

The AIF1 BCLK/LRCLK control fields are described in Table 4-41.

Table 4-40. AIF3 Signal Path Enable

Bit

Label

Default

Description

R1433 (0x0599)

AIF3_Tx_Enables

AIF3TX2_ENA

AIF3 Audio Interface TX Channel 2 Enable

0 = Disabled

1 = Enabled

AIF3TX1_ENA

AIF3 Audio Interface TX Channel 1 Enable

0 = Disabled

1 = Enabled

R1434 (0x059A)

AIF3_Rx_Enables

AIF3RX2_ENA

AIF3 Audio Interface RX Channel 2 Enable

0 = Disabled

1 = Enabled

AIF3RX1_ENA

AIF3 Audio Interface RX Channel 1 Enable

0 = Disabled

1 = Enabled

Table 4-41. AIF1 BCLK and LRCLK Control

Address

Bit

Label

Default

Description

R1280

(0x0500)

AIF1_

BCLK_Ctrl

4:0 AIF1_BCLK_

FREQ[4:0]

0x0C AIF1BCLK Rate. The AIF1BCLK rate must be less than or equal to SYSCLK/2.

0x00–0x01 = Reserved

0x02 = 64 kHz (58.8 kHz)

0x03 = 96 kHz (88.2 kHz)

0x04 = 128 kHz (117.6 kHz)

0x05 = 192 kHz (176.4 kHz)

0x06 = 256 kHz (235.2 kHz)

0x07 = 384 kHz (352.8 kHz)

0x08 = 512 kHz (470.4 kHz)

0x09 = 768 kHz (705.6 kHz)

0x0A = 1.024 MHz (940.8 kHz)

0x0B = 1.536 MHz (1.4112 MHz)

0x0C = 2.048 MHz (1.8816 MHz)

0x0D = 3.072 MHz (2.8824 MHz)

0x0E = 4.096 MHz (3.7632 MHz)

0x0F = 6.144 MHz (5.6448 MHz)

0x10 = 8.192 MHz (7.5264 MHz)

0x11 = 12.288 MHz (11.2896 MHz)

0x12 = 24.576 MHz (22.5792 MHz)

The frequencies in brackets apply for 44.1 kHz–related sample rates only (SAMPLE_RATE_

=01XXX).

R1286

(0x0506)

AIF1_Rx_

BCLK_Rate

12:0 AIF1_

BCPF[12:0]

0x0040 AIF1LRCLK Rate. Selects the number of BCLK cycles per AIF1LRCLK frame. AIF1LRCLK

clock = AIF1BCLK/AIF1_BCPF.

Integer (LSB = 1), Valid from 8 to 8191.

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