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DS1085F3

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CS47L35

4.8 SLIMbus Interface

The AIF1 TDM and tristate control fields are described in Table 4-47.

The AIF2 TDM and tristate control fields are described in Table 4-48.

The AIF3 TDM and tristate control fields are described in Table 4-49.

4.8 SLIMbus Interface

The SLIMbus protocol is highly configurable and adaptable, supporting multiple audio signal paths, and mixed sample

rates simultaneously. It also supports control messaging and associated communications between devices.

4.8.1

SLIMbus Devices

The SLIMbus components comprise different device classes (manager, framer, interface, generic). Each component on

the bus has an interface device, which provides bus management services for the respective component. One or more

components on the bus provide manager and framer device functions; the manager has the capabilities to administer the

bus, although the framer is responsible for driving the CLK line and for driving the DATA required to establish the frame

structure on the bus. Note that only one manager and one framer device is active at any time. The framer function can be

transferred between devices when required. Generic devices provide the basic SLIMbus functionality for the associated

ports, and for the transport protocol by which audio signal paths are established on the bus.

4.8.2

SLIMbus Frame Structure

The SLIMbus bit stream is formatted within a defined structure of cells, slots, subframes, frames, and superframes:

• A single data bit is known as a cell.

• Four cells make a slot.

Table 4-47. AIF1 TDM and Tristate Control

Bit

Label

Default

Description

R1281 (0x0501)

AIF1_Tx_Pin_Ctrl

AIF1TX_DAT_TRI

AIF1TXDAT Tristate Control

0 = Logic 0 during unused time slots

1 = Tristated during unused time slots

R1283 (0x0503)

AIF1_Rate_Ctrl

AIF1_TRI

AIF1 Audio Interface Tristate Control

0 = Normal

1 = AIF1 Outputs are tristated

Note that this bit only affects output pins configured for the respective AIF1 function.

Table 4-48. AIF2 TDM and Tristate Control

Bit

Label

Default

Description

R1345 (0x0541)

AIF2_Tx_Pin_Ctrl

AIF2TX_DAT_TRI

AIF2TXDAT Tristate Control

0 = Logic 0 during unused time slots

1 = Tristated during unused time slots

R1347 (0x0543)

AIF2_Rate_Ctrl

AIF2_TRI

AIF2 Audio Interface Tristate Control

0 = Normal

1 = AIF2 Outputs are tristated

Note that this bit only affects output pins configured for the respective AIF2 function.

Table 4-49. AIF3 TDM and Tristate Control

Bit

Label

Default

Description

R1409 (0x0581)

AIF3_Tx_Pin_Ctrl

AIF3TX_DAT_TRI

AIF3TXDAT Tristate Control

0 = Logic 0 during unused time slots

1 = Tristated during unused time slots

R1411 (0x0583)

AIF3_Rate_Ctrl

AIF3_TRI

AIF3 Audio Interface Tristate Control

0 = Normal

1 = AIF3 Outputs are tristated

Note that this bit only affects output pins configured for the respective AIF3 function.

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