CS47L35 datasheet(105/300 Pages) CIRRUS

105 / 300 page

DS1085F3

105

CS47L35

4.5 DSP Peripheral Control

4.5.4.3 Common Functions to Standard GPIOs

The DSP GPIO functions are implemented alongside the standard GPIO capability, providing an alternative method of

maskable I/O control for all of the GPIO pins. The DSP GPIO control bits in the register map are implemented in a manner

that supports efficient read/write access for multiple GPIOs at once.

The DSP GPIO logic is shown in Fig. 4-33, which also shows the control fields relating to the standard GPIO.

The DSP GPIO function is selected by setting GPn_FN = 0x002 for the respective GPIO pin. Integrated pull-up and

pull-down resistors are provided on each of the GPIO pins, which are also valid for DSP GPIO function. A bus keeper

function is supported on the GPIO pins; this is enabled using the respective pull-up and pull-down control bits. The bus

keeper function holds the logic level unchanged whenever the pin is undriven (e.g., if the signal is tristated). See

Table 4-83 for details of the GPIO pull-up and pull-down control bits.

4.5.4.4 DSP GPIO Block Diagram and Control Registers

Figure 4-33. DSP GPIO Control

The control registers associated with the DSP GPIO are described in Table 4-34.

Input / Output control

Logic Level control

Mask control

DSPGPn_SET2_LVL

DSPGPn_SET2_DIR

DSPGPn_SET2_MASK

Input / Output control

Logic Level control

Mask control

DSPGPn_SET3_LVL

DSPGPn_SET3_DIR

DSPGPn_SET3_MASK

Input / Output control

Logic Level control

Mask control

DSPGPn_SET4_LVL

DSPGPn_SET4_DIR

DSPGPn_SET4_MASK

Input / Output control

Logic Level control

Mask control

DSPGPn_SET1_LVL

DSPGPn_SET1_DIR

DSPGPn_SET1_MASK

DSP GPIO

Readback

DSPGPn_STS

GPn_FN = 0x002

GPIO Control

& Readback

GPn_LVL

GPn_FN = 0x001

Pin-Specific

Function

GPn_FN = 0x000

Other GPIO

functions

GPn_PU

GPn_PD

GPIOn

GPn_FN > 0x002

GPn_FN

GPn_POL

GPn_OP_CFG

These bits have no effect if GPn_FN = 0x000 or 0x002.

GPn_DB

Valid for GPn_LVL readback and GPIO IRQ event trigger only.

GPn_DIR

These bits have no effect if GPn_FN = 0x000 or 0x002.

If GPn_FN = 0x000, pin direction is set automatically .

If GPn_FN = 0x002, pin direction is set by DSPGPn_SETx_DIR.

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