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MPC8560CPX667JC датащи(PDF) 101 Page - NXP Semiconductors |
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MPC8560CPX667JC датащи(HTML) 101 Page - NXP Semiconductors |
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101 / 108 page ![]() MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2 Freescale Semiconductor 101 Document Revision History 3.0 Table 1—Corrected MII management voltage reference Section 2.1.3—New Table 2—Corrected MII management voltage reference Table 5—Removed ‘minimum’ column Table 5—Added AVDD power table Table 8—New Table 9—New Table 9—New Table 13—Added overshoot/undershoot note. Figure 4—New Table 16—Restated tMCKSKEW1 as tMCKSKEW, removed tMCKSKEW2; added speed-specific minimum values for 333, 266, and 200 MHz; updated tDDSHME values. Updated chapter to reflect that GMII, MII and TBI can be run with 2.5V signalling. Table 29—Added MDIO output valid timing Table 31—Updated tLBIVKH1, tLBIXKH1, and tLBOTOT. Table 32—New Figure 20, Figure 22—Updated clock reference Table 34—Updated tTDIVKH Table 35—Updated tTDKHOX Added tables and figures for CPM I2C Table 45—Updated tPCIVKH Section 14.1— Changed minimum height from 2.22 to 3.07 and maximum from 2.76 to 3.75 Table 54.—Updated MII management voltage reference and added note 20. Section 16.2.4.1—Changed θJC from 0.3 to 0.8; changed die-junction temperature from 67° to 71° Section 17.7—Added paragraph that begins “TSEC1_TXD[3:0]...” 2.1 Section 2.1.3—New Table 16—Added speed-specific minimum values for 333, 266, and 200 MHz Table 31—Replaced all references to TSEC1_TXD[6:5] to TSEC2_TXD[6:5] Table 31—Added tLBSKEW and note 3 Table 31—Added comment about rev. 2.x devices to note 5 Section 14.1— Changed minimum height from 2.22 to 3.07 and maximum from 2.76 to 3.75 Section 16.2.4.1—Changed θJC from 0.3 to 0.8; changed die-junction temperature from 67° to 71° Section 17.7—Added paragraph that begins “TSEC1_TXD[3:0]...” Table 62. Document Revision History (continued) Rev. No. Substantive Change(s) |
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