MPC8560CPX667JC datasheet(44/108 Pages) NXP

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MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2

Freescale Semiconductor

CPM

9.2 CPM AC Timing Specifications

Table 34 and Table 35 provide the CPM input and output AC timing specifications, respectively.

NOTE: Rise/Fall Time on CPM Input Pins

It is recommended that the rise/fall time on CPM input pins should not

exceed 5 ns. This should be enforced especially on clock signals. Rise time

refers to signal transitions from 10% to 90% of VCC; fall time refers to

transitions from 90% to 10% of VCC.

Output high voltage (IOH = –2.0 mA)

VOH

2.4

—

Output low voltage (IOL = 3.2 mA)

VOL

—0.4

Note:

1. This specification applies to the following pins: PA[0–31], PB[4–31], PC[0–31], and PD[4–31].

2. VIL(max) for the IIC interface is 0.8 V rather than the 1.5 V specified in the IIC standard

Table 34. CPM Input AC Timing Specifications 1

Characteristic

Symbol 2

Min 3

Unit

FCC inputs—internal clock (NMSI) input setup time

tFIIVKH

6ns

FCC inputs—internal clock (NMSI) hold time

tFIIXKH

0ns

FCC inputs—external clock (NMSI) input setup time

tFEIVKH

2.5

FCC inputs—external clock (NMSI) hold time

tFEIXKHb2

SCC/SPI inputs—internal clock (NMSI) input setup time

tNIIVKH

6ns

SCC/SPI inputs—internal clock (NMSI) input hold time

tNIIXKH

0ns

SCC/SPI inputs—external clock (NMSI) input setup time

tNEIVKH

4ns

SCC/SPI inputs—external clock (NMSI) input hold time

tNEIXKH

2ns

TDM inputs/SI—input setup time

tTDIVKH

4ns

TDM inputs/SI—hold time

tTDIXKH

3ns

Table 33. CPM DC Electrical Characteristics (continued)

Characteristic

Symbol

Min

Max

Unit

Notes

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