MPC8560CPX667JC datasheet(63/108 Pages) NXP

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MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2

Freescale Semiconductor

RapidIO

Duty cycle

2, 6

VOD rise time, 20%–80% of peak-to-peak

differential signal swing

tFALL

200

—

3, 6

VOD fall time, 20%–80% of peak-to-peak

differential signal swing

tRISE

200

—

Data valid

1260

—

Skew of any two data outputs

tDPAIR

—

180

4, 6

Skew of single data outputs to associated clock

tSKEW,PAIR

–180

180

5, 6

Notes:

1.See Figure 44.

2.Requires ±100 ppm long term frequency stability.

3.Measured at VOD = 0 V.

4.Measured using the RapidIO transmit mask shown in Figure 44.

5.See Figure 49.

6.Guaranteed by design.

Table 49. RapidIO Driver AC Timing Specifications—750 Mbps Data Rate

Characteristic

Symbol

Range

Unit

Notes

Min

Max

Differential output high voltage

VOHD

200

540

Differential output low voltage

VOLD

–540

–200

Duty cycle

2, 6

VOD rise time, 20%–80% of peak-to-peak

differential signal swing

tFALL

133

—

3, 6

VOD fall time, 20%–80% of peak-to-peak

differential signal swing

tRISE

133

—

Data valid

800

—

Skew of any two data outputs

tDPAIR

—

133

4, 6

Skew of single data outputs to associated clock

tSKEW,PAIR

–133

133

5, 6

Notes:

1.See Figure 44.

2.Requires ±100 ppm long term frequency stability.

3.Measured at VOD = 0 V.

4.Measured using the RapidIO transmit mask shown in Figure 44.

5.See Figure 49.

6.Guaranteed by design.

Table 48. RapidIO Driver AC Timing Specifications—500 Mbps Data Rate (continued)

Characteristic

Symbol

Range

Unit

Notes

Min

Max

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