AD9545 datasheet(97/157 Pages) AD

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Data Sheet

AD9545

Rev. A | Page 97 of 157

CASCADED DPLL CONFIGURATION

The cascaded DPLL configuration is used to lock both DPLLs

to the same reference source, yet have both DPLLs remain

phase locked, even if all reference sources are lost. To

understand cascaded configuraions, first consider device

operation without cascaded capability, as shown in Figure 79.

As a prerequisite, the reader must be familiar with the

Translation Profiles section and the Reference Switching

section. Note that Figure 79 and Figure 80 show simplistic

diagrams of the DPLL showing a phase buildout configuration,

but the zero delay (hitless) configuration is valid as well.

The far left side of Figure 79 shows two valid reference sources

with DPLL0 and DPLL1 using Translation Profile 0.a and

Translation Profile 1.z, respectively, assigned to Reference

Source 1. Therefore, both DPLLs lock to a common reference as

desired.

The middle portion of Figure 79 shows the result of losing

Reference Source 1. The loss of Reference Source 1 results in

both DPLLs independently searching for a new reference

source, assuming automatic reference switching is in effect (see

the Reference Switching section). Presumably, the user has

defined translation profiles in such a way that DPLL0 finds

Translation Profile 0.b and DPLL1 finds Translation Profile 1.y

with both profiles assigning the same valid reference source

(Reference Source 2, in this example). As such, both DPLLs

again lock to a common reference as desired.

The far right hand side of Figure 79 shows the result of losing

Reference Source 2, leaving no valid reference sources. In this

case, both DPLLs have no recourse but to switch to holdover or

freerun mode. However, because the DPLLs may not have

exactly the same FTW in effect when they switch to holdover or

freerun mode, their outputs are no longer phase locked, which

breaks the original requirement that both DPLLs remain phase

locked when all reference sources are lost. The cascaded

configuration provides a solution to this problem.

DIGITAL

CROSS

POINT

MUX

TDC

REFERENCE

SOURCES

APLL 0

PFD

NCO

DPLL 0

PFD

NCO

DPLL 1

APLL 1

REFERENCE

SOURCE 1

LOST

APLL 0

NCO

APLL 1

FTW

TRANSLATION

PROFILE 0.a

TRANSLATION

PROFILE 1.z

APLL 0

PFD

NCO

DPLL 0

PFD

NCO

DPLL 1

DPLL 0

DPLL 1

APLL 1

TRANSLATION

PROFILE0.b

TRANSLATION

PROFILE 1.y

ALL

REFERENCE

SOURCES

LOST

DIGITAL

CROSS

POINT

MUX

DIGITAL

CROSS

POINT

MUX

BOTH DPLLS SWITCH TO

HOLDOVER/FREERUN

TRANSL ATION PROFILE 0.a AND

TRANSL ATION PROFILE 1.z ASSIGN

REFERENCE SOURCE 1

TRANSL ATION PROFILE 0.b AND

TRANSLATION PROFILE 1.y ASSIGN

REFERENCE SOURCE 2

TDC

REFERENCE

SOURCES

TDC

Figure 79. Non-Cascaded DPLL Operation

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