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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MMPF0100Z датащи(PDF) 12 Page - NXP Semiconductors |
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MMPF0100Z датащи(HTML) 12 Page - NXP Semiconductors |
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12 / 128 page  12 NXP Semiconductors PF0100Z GENERAL PRODUCT CHARACTERISTICS 4.3.2 Current consumption The current consumption of the individual blocks is described in detail throughout this specification. For convenience, a summary table follows for standard use cases. Table 8. Current consumption summary PF0100Z TA = -40 °C to 85 °C, PF0100AZ TA = -40 °C to 105 °C, VIN = 3.6 V, VDDIO = 1.7 V to 3.6 V, LICELL = 1.8 V to 3.3 V, VSNVS = 3.0 V, typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VDDIO = 3.3 V, LICELL = 3.0 V, VSNVS = 3.0 V and 25 °C, unless otherwise noted. Mode PF0100Z conditions System conditions Typ. Max. Unit Notes Coin Cell VSNVS from LICELL All other blocks off VIN = 0.0 V VSNVSVOLT[2:0] = 110 No load on VSNVS 4.0 7.0 μA (16),(18), (21) Off MMPF0100Z VSNVS from VIN or LICELL Wake-up from PWRON active 32 k RC on All other blocks off VIN ≥ UVDET No load on VSNVS, PMIC able to wake-up 16 21 μA (17),(18) Off MMPF0100AZ VSNVS from VIN or LICELL Wake-up from PWRON active 32 k RC on All other blocks off VIN ≥ UVDET No load on VSNVS, PMIC able to wake-up 17 25 μA (17),(18) Sleep VSNVS from VIN Wake-up from PWRON active Trimmed reference active SW3A/B PFM Trimmed 16 MHz RC off 32 k RC on VREFDDR disabled TA = -40 °C to 85 °C TA = -40 °C to 105 °C (PF0100AZ Only) No load on VSNVS. DDR memories in self refresh 122 122 220 250 μA (18) Standby MMPF0100Z VSNVS from either VIN or LICELL SW1A/B combined in PFM SW1C in PFM SW2 in PFM SW3A/B combined in PFM SW4 in PFM SWBST off Trimmed 16 MHz RC enabled Trimmed reference active VGEN1-6 enabled VREFDDR enabled No load on VSNVS. Processor enabled in low power mode. All rails powered on except boost (load = 0 mA) 297 297 450 (19) 1000 (20) μA (18) |
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