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MMPF0100Z датащи(PDF) 57 Page - NXP Semiconductors

номер детали MMPF0100Z
подробное описание детали  14 channel configurable power management integrated circuit
PDF  128 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100Z датащи(HTML) 57 Page - NXP Semiconductors

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PF0100Z
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
6.4.4.5.2
SW3A/B dual phase
SW3A/B can be connected in dual phase configuration using one inductor per switching node, as shown in Figure 18. This mode allows
a smaller output voltage ripple. Feedback is taken from pin SW3AFB and pin SW3BFB must be left open. Although control is from SW3A,
registers of both regulators, SW3A and SW3B, must be identically set. In this configuration, the regulators switch 180 degrees apart.
Figure 18. SW3A/B dual phase block diagram
6.4.4.5.3
SW3A - SW3B independent outputs
SW3A and SW3B can be configured as independent outputs as shown in Figure 19, providing flexibility for applications requiring more
voltage rails with less current capability. Each output is configured and controlled independently by its respective I2C registers as shown
in Table 65.
Driver
Controller
EA
Z1
Z2
Internal
Compensation
SW3AIN
SW3ALX
SW3AFB
ISENSE
COSW3A
CINSW3A
LSW3A
I2C
Interface
SW3
SW3AMODE
SW3AFAULT
VREF
DAC
I2C
VIN
Driver
Controller
SW3BIN
SW3BLX
ISENSE
COSW3B
CINSW3B
LSW3B
EP
SW3BMODE
SW3BFAULT
VIN
EA
Z1
Z2
Internal
Compensation
VREF
DAC
I2C
SW3BFB



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