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MMPF0100Z датащи(PDF) 36 Page - NXP Semiconductors

номер детали MMPF0100Z
подробное описание детали  14 channel configurable power management integrated circuit
PDF  128 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0100Z датащи(HTML) 36 Page - NXP Semiconductors

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NXP Semiconductors
PF0100Z
FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS
6.4.4.2.3
Programmable maximum current
The maximum current, ISWxMAX, of each buck regulator is programmable. This allows the use of smaller inductors where lower currents
are required. Programmability is accomplished by choosing the number of paralleled power stages in each regulator. The
SWx_PWRSTG[2:0] bits in Table 137. Extended page 2, page 110 of the register map control the number of power stages. See Table 38
for the programmable options. Bit[0] must always be enabled to ensure the stage with the current sensor is chosen. The default setting,
SWx_PWRSTG[2:0] = 111, represents the highest maximum current. The current limit for each option is also scaled by the percentage of
power stages that are enabled.
Table 36. Optimum phasing
Frequencies
Optimum phasing
1.0 MHz
2.0 MHz
0 °
180 °
1.0 MHz
4.0 MHz
0 °
180 °
2.0 MHz
4.0 MHz
0 °
180 °
1.0 MHz
2.0 MHz
4.0 MHz
0 °
90 °
90 °
Table 37. Regulator frequency configuration
SWxFREQ[1:0]
Frequency
00
1.0 MHz
01
2.0 MHz
10
4.0 MHz
11
Reserved
Table 38. Programmable current configuration
Regulators
Control bits
% of power stages
enabled
Rated current (A)
SW1AB
SW1AB_PWRSTG[2:0]
ISW1ABMAX
0
0
1
40%
1.0
0
1
1
80%
2.0
1
0
1
60%
1.5
1
1
1
100%
2.5
SW1C
SW1C_PWRSTG[2:0]
ISW1CMAX
0
0
1
43%
0.9
0
1
1
58%
1.2
1
0
1
86%
1.7
1
1
1
100%
2.0
SW2
SW2_PWRSTG[2:0]
ISW2MAX
0
0
1
38%
0.75
0
1
1
75%
1.5
1
0
1
63%
1.25
1
1
1
100%
2.0



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