MMPF0100Z datasheet(20/128 Pages) NXP

20 / 128 page

NXP Semiconductors

PF0100Z

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

6.1.2

One time programmability (OTP)

OTP allows the programming of start-up configurations for a variety of applications. Before permanently programming the IC by

programming fuses, a configuration may be prototyped by using the “try before buy” (TBB) feature. Further, an error correction code (ECC)

algorithm is available to correct a single bit error and to detect multiple bit errors when fuses are programmed.

The following parameters which can be configured by OTP are listed.

• General: I2C slave address, PWRON pin configuration, start-up sequence and timing

• Buck regulators: Output voltage, dual/single phase or independent mode configuration, switching frequency, and soft start ramp

rate

• Boost regulator and LDOs: Output voltage

NOTE: When prototyping or programming fuses, the user must ensure register settings are consistent with the hardware configuration.

This is most important for the buck regulators, where the quantity, size, and value of the inductors depend on the configuration (single/

dual phase or independent mode) and the switching frequency. Additionally, if an LDO is powered by a buck regulator, it is gated by the

buck regulator in the start-up sequence.

6.1.2.1

Start-up sequence and timing

Each regulator has 5-bits allocated to program its start-up time slot from a turn on event; therefore, each can be placed from position one

to thirty-one in the start-up sequence. The all zeros code indicates a regulator is not part of the start-up sequence and remains off. See

Table 11. The delay between each position is equal; however, four delay options are available. See Table 12. The start-up sequence

terminates at the last programmed regulator.

tD4

Delay between regulators

SEQ_CLK_SPEED[1:0] = 00

–0.5

–

SEQ_CLK_SPEED[1:0] = 01

–1.0

–

SEQ_CLK_SPEED[1:0] = 10

–2.0

–

SEQ_CLK_SPEED[1:0] = 11

–4.0

–

tR4

Rise time of RESETBMCU

–

0.2

–

tD5

Turn-on delay of RESETBMCU

–

2.0

–

Notes

23.

Assumes LICELL voltage is valid before VIN is applied. If LICELL is not valid before VIN is applied then VSNVS turn-on delay may extend to a

maximum of 24 ms.

24.

Depends on the external signal driving PWRON.

25.

Default configuration.

26.

Rise time is a function of slew rate of regulators and nominal voltage selected.

Table 11. Start-up sequence

SWxx_SEQ[4:0]/

VGENx_SEQ[4:0]/

VREFDDR_SEQ[4:0]

Sequence

00000

Off

00001

SEQ_CLK_SPEED[1:0] * 1

00010

SEQ_CLK_SPEED[1:0] * 2

11111

SEQ_CLK_SPEED[1:0] * 31

Table 10. Default start-up sequence timing (continued)

Parameter

Description

Min.

Typ.

Max.

Unit

Notes

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