PC87413 datasheet(121/257 Pages) NSC

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6.0 ACCESS.bus Interface (Continued)

Revision 1.2

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After the last bytes of a write transaction, if the master supplies additional ACBCLK cycles, the PC8741x device receives the

PEC byte and compare it with the calculated PEC value. Otherwise, it just ignores the calculated PEC. If the comparison

fails, the PC8741x device generates a NACK bit at the end of the PEC byte and sets the PECERR bit in the ACBCST register

(see Section 6.3.2 on page 127) but does not execute the write transaction.

At the end of the last byte of a read transaction, if the master generates an ACK for the last byte (instead of a NACK), the

PC8741x device sends the calculated PEC value during the following byte. Otherwise, it discards the calculated PEC.

PEC Implementation

The PEC is an 8-bit cyclic redundancy check (CRC-8) value attached at the end of an ACCESS.bus transaction as the last

byte transmitted before the Stop condition.

The PC8741x device calculates the PEC value by hardware (bit-by-bit), using all the bytes in the transaction (except the PEC

byte itself). PEC calculation does not include Start, Restart, Stop, ACK or NACK, which are bus control bits and not data

bits. The PEC value is generated using the polynomial C(x) = x8 +x2 +x1 + 1, which is speciﬁed in Intel's SMBus Speciﬁca-

tion (Rev 1.1 Dec. 11, 1998). During a read transaction, the PEC value is generated by the PC8741x device and checked

by the master; during a write transaction, it is generated by the master and checked by the slave.

6.2.9

ACCESS.bus Protocol

The protocol is based on five basic byte types: Save Address, Command, Offset Address, Data and PEC; these are de-

scribed below. An error is flagged in the following cases:

If the number of bytes in the transaction differs from the number of bytes required by the Command byte.

For Command byte type, if the reserved bit is not zero.

When an error is flagged, a NACK is generated at the end of the current byte (the current transaction is aborted) and the

ILGCOM bit in the ACBCST register is set (see Section 6.3.2 on page 127).

Slave Address Byte Type

Bit

76543210

Name

SLAVEAD

ACBRW

Bit

Description

7-1

SLAVEAD (Slave Address). This seven-bit ﬁeld indicates the slave address of the accessed device. If its value

is the same as the one selected during the set-up process (see Section 6.2.6), the PC8741x device responds

to the present transaction.

ACBRW (ACCESS.bus Read/Write Mode). Selects the transfer direction for the current transaction.

0: Write ACCESS.bus transaction (from master to slave) - equivalent to an even 8-bit slave address

1: Read ACCESS.bus transaction (from slave to master) - equivalent to an odd 8-bit slave address

PC87413 датащи(PDF) 121 Page - National Semiconductor (TI)