PC87413 datasheet(58/257 Pages) NSC

58 / 257 page

3.0 Device Architecture and Configuration (Continued)

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Revision1.2

3.8

FLOPPY DISK CONTROLLER (FDC) CONFIGURATION

3.8.1

General Description

The generic FDC is a standard FDC with a digital data separator and is DP8473 and N82077 software compatible. The

PC8741x FDC supports 14 of the 17 standard FDC signals described in the generic Floppy Disk Controller (FDC) chapter,

including (see Section 10.1 on page 220):

• FM and MFM modes are supported. To select either mode, set bit 6 of the first command byte when writing to/reading

from a diskette, where:

0 = FM mode

1 = MFM mode

• A logic 1 is returned during LPC I/O read cycles by all register bits reflecting the state of floating (TRI-STATE) FDC pins.

Exceptions to standard FDC are:

• Automatic media sense using the MSEN1 signal is not supported

• DRATE1 is not supported.

The FDC functional block registers are shown in Section 10.1 on page 220. All these registers are VDD powered.

3.8.2

Logical Device 0 (FDC) Configuration

Table 17 lists the configuration registers that affect the FDC. Only the last two registers (F0h and F1h) are described here.

See Section 3.2.3 on page 40 for descriptions of the other configuration registers. All these registers are VDD powered.

Table 17. FDC Conﬁguration Registers

Index

Conﬁguration Register or Action

Type

Power Well

Reset

30h

Activate (see Section 3.3.1 on page 43).

R/W

VDD

00h

60h

Base Address MSB register. Bits 7-3 (for A15-11) are read only, 00000b.

R/W

VDD

03h

61h

Base Address LSB register. Bits 2 and 0 (for A2 and A0) are read only, 00b.

R/W

VDD

F2h

70h

Interrupt Number and Wake-Up on IRQ Enable register.

R/W

VDD

06h

71h

Interrupt Type. Bit 1 is read/write; other bits are read only.

R/W

VDD

03h

74h

DMA Channel Select.

R/W

VDD

02h

75h

Report no second DMA assignment.

VDD

04h

F0h

FDC Conﬁguration register.

R/W

VDD

24h

F1h

Drive ID register.

R/W

VDD

00h

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