PC87413 datasheet(52/257 Pages) NSC

52 / 257 page

3.0 Device Architecture and Configuration (Continued)

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Revision1.2

3.7.5

ServerI/O Configuration 4 Register (SIOCF4)

Power Well:VSB

Location:Index 24h

Type:

R/W or RO

Bit

43210

Name

HFCKMUX

LFCKMUX

Reserved

SMI2IRQ2

NOXBUS

NOADDIR

XRDYMUX

Reset

Strap

Bit

Description

HFCKMUX (HFCKOUT Multiplex Control). Selects the function connected to pin 13.

0: HFCKOUT - Clock Generator (default)

1: GPIO07 port - GPIO

6-5

LFCKMUX (LFCKOUT Multiplex Control). Selects the function connected to pin 45.

Bits

6 5

Function

0 0:

GPIO53 port - GPIO (default; internally, MSEN0 is set to 1)

0 1:

LFCKOUT - Clock Generator (internally, MSEN0 is set to 1)

1 0:

MSEN0 - FDC

1 1:

Reserved

Reserved.

SMI2IRQ2 (SMI to IRQ2 Enable). This bit enables the SMI interrupt to the IRQ2 slot of the SERIRQ.

0: Disabled (default)

1: Enabled (the SMI interrupt is shared with the interrupt source selected to IRQ2; see Table 13 on page 41)

NOXBUS (Basic X-Bus Multiplex Control). Selects the function connected to pins 14-19 and 24-31. The

default value is set according to the XCNF2 strap, sampled at VSB Power-Up reset.

0: GPIO20-GPIO25, GPIO30-GPIO37 ports - GPIO

1: XRD_XEN, XWR_XRW, XA3-XA0, XD7-XD0 - X-Bus (PC87416 and PC87417)

NOADDIR (XA11-4 Multiplex Control). Selects the function connected to pins 1-8. The default value is set by

the XCNF1 strap if XCNF2 = 1 or to 0 if XCNF2 = 0. The XCNF2 and XCNF1 straps are sampled at VSB

Power-Up reset.

0: GPIOE10-GPIOE17 ports - GPIO

1: XA11-XA4 - X-Bus (PC87416 and PC87417)

XRDYMUX (XRDY Multiplex Control). Selects the function connected to pin 9. The default value is set by the

XCNF0 strap if XCNF2 = 1 or to 0 if XCNF2 = 0. The XCNF2 and XCNF0 straps are sampled at VSB Power-

Up reset.

0: GPIO05 port - GPIO (internally, XRDY is set to 1; device ready)

1: XRDY - X-Bus (PC87416 and PC87417)

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