PC87413 datasheet(208/257 Pages) NSC

208 / 257 page

9.0 System Wake-Up Control (SWC) (Continued)

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Revision1.2

9.4.6

PM1 Control Low Register (PM1b_CNT_LOW)

This register contains the eight low bits of the PM1_CNT register. The PC8741x devices contain the block ‘b’ instance of the

PM1_CNT register. This register belongs to the PM1 Control Group of the ACPI fixed-feature space registers.

PM1_CNT register bits that are specified by the ACPI but not implemented in the PC8741x devices have a ‘0’ value.

Power Well:VSB

Location:Offset 00h

Type:

9.4.7

PM1 Control High Register (PM1b_CNT_HIGH)

This register contains the eight high bits of the PM1_CNT register. The PC8741x devices contain the block ‘b’ instance of

the PM1_CNT register. This register belongs to the PM1 Control Group of the ACPI fixed-feature space registers.

PM1_CNT register bits that are specified by the ACPI but not implemented in the PC8741x devices have a ‘0’ value. All the

implemented control bits behave according to the Control bit definition (the bit is read/write by software) and Write-Only Con-

trol Bit definition (the bit is written by software; when read, it returns 0) in the ACPI Specification.

Power Well:VSB

Location: Offset 01h

Type:

Varies per bit

Bit

76543210

Name

Reserved

GBL_RLS

BM_RLD

SCI_EN

Reset

00000000

Bit

Description

7-3

Reserved.

GBL_RLS (Global Lock Release). Not implemented. Always at ‘0’.

BM_RLD (Bus Master Request Control). Not implemented. Always at ‘0’.

SCI_EN (SCI Enable). Not implemented. Always at ‘0’.

Bit

76543210

Name

Reserved

SLP_EN

SLP_TYPx

Ignored

Reserved

Reset

00000000

Bit

Type

Description

7-6

Reserved.

5WO

SLP_EN (Sleep Enable). Setting this bit causes the PC8741x device to accept the value of SLP_TYPx

as the system state code. This bit may be set in the same write cycle with a new SLP_TYPx value.

0: Inactive (default)

1: Update the system state code from the SLP_TYPx value

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