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PC87413 датащи(PDF) 207 Page - National Semiconductor (TI) |
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PC87413 датащи(HTML) 207 Page - National Semiconductor (TI) |
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207 / 257 page ![]() 9.0 System Wake-Up Control (SWC) (Continued) Revision 1.2 207 www.national.com 9.4.5 PM1 Enable High Register (PM1b_EN_HIGH) This register contains the eight high bits of the PM1_EN register. The PC8741x devices contain the block ‘b’ instance of the PM1_EN register. This register belongs to the PM1 Event Group of the ACPI fixed-feature space registers. PM1_EN register bits that are specified by the ACPI but not implemented in the PC8741x devices have a ‘0’ value. All the imple- mented enable bits behave according to the Enable Bit definition (the bit is read/write by software) in the ACPI Specification. Power Well:VSB Location: Offset 03h Type: R/W Bit 76543210 Name Reserved RTC_EN SLPBTN _EN PWRBTN _EN Reset 00000000 Bit Description 7-3 Reserved. 2 RTC_EN (RTC Event Enable). Enables the RTC alarm to generate a power management interrupt (SIOSCI). This bit is forced to ‘0’ when the RTC_EV_DIS bit in the ACPI_CFG register is reset to ‘0’, disabling any RTC alarm event. 0: Disable SCI (default) 1: Enable SCI from RTC alarm 1 SLPBTN_EN (Sleep Button Event Enable). Enables Sleep button pressing to generate a power management interrupt (SIOSCI). This bit is forced to ‘0’ when the SLPBTN_EV_DIS bit in the ACPI_CFG register is reset to ‘0’, disabling any Sleep button event. 0: Disable SCI (default) 1: Enable SCI from Sleep button pressing 0 PWRBTN_EN (Power Button Event Enable). Enables Power button pressing to generate a power management interrupt (SIOSCI) when the system is in the active state (S0). This bit does not influence SCI generation when the system is in a sleep state (S1-S5). This bit is forced to ‘0’ when the PWRBTN_EV_DIS bit in the ACPI_CFG register is reset to ‘0’, disabling any Power button event. 0: Disable SCI (default) 1: Enable SCI from Power button pressing |
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