PC87413 datasheet(206/257 Pages) NSC

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9.0 System Wake-Up Control (SWC) (Continued)

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Revision1.2

9.4.4

PM1 Enable Low Register (PM1b_EN_LOW)

This register contains the eight low bits of the PM1_EN register. The PC8741x devices contain the block ‘b’ instance of the

PM1_EN register. This register belongs to the PM1 Event Group of the ACPI fixed-feature space registers.

PM1_EN register bits that are specified by the ACPI but not implemented in the PC8741x devices have a ‘0’ value.

Power Well:VSB

Location: Offset 02h

Type:

RTC_STS (RTC Event Status). Indicates that an enabled RTC alarm has occurred. This bit is set by the RTC

alarm becoming active. Writing ‘1’ clears this bit and the RTC_EVT_STS bit in the GPE1_STS_3 register; writing

‘0’ is ignored. This bit is forced to ‘0’ when the RTC_EV_DIS bit in the ACPI_CFG register is reset to ‘0’, ignoring

any RTC alarm.

0: Inactive (default)

1: An RTC alarm has occurred

SLPBTN_STS (Sleep Button Event Status). Indicates that the Sleep button was pressed. This feature is

compatible with the ACPI model for a two-button system. The SLBTIN signal is internally debounced. Writing ‘1’

clears this bit and the SLBT_EVT_STS bit in the GPE1_STS_2 register; writing ‘0’ is ignored. This bit is forced

to ‘0’ when the SLPBTN_EV_DIS bit in the ACPI_CFG register is reset to ‘0’, ignoring any Sleep button event.

0: Inactive (default)

1: The Sleep button was pressed

PWRBTN_STS (Power Button Event Status). Indicates that the Power button was pressed. This feature is

compatible with the ACPI model for both a single-button and a two-button system. The PWBTIN signal is

internally debounced. Writing ‘1’ clears this bit and the PWBT_EVT_STS bit in the GPE1_STS_2 register; writing

‘0’ is ignored. This bit is forced to ‘0’ when the PWRBTN_EV_DIS bit in the ACPI_CFG register is reset to ‘0’,

ignoring any Power button event. This bit is also cleared in Legacy Power Button mode (LEGACY_PWBT = 1

in PWONCTL) when VDD is turned off by pressing the Power button.

0: Inactive (default)

1: The Power button was pressed

Bit

76543210

Name

Reserved

GBL_EN

Reserved

TMR_EN

Reset

00000000

Bit

Description

7-6

Reserved.

GBL_EN (Global Lock Enable). Not implemented. Always at ‘0’.

4-1

Reserved.

TMR_EN (PM Timer Enable). Not implemented. Always at ‘0’.

Bit

Description

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