| поискавой системы для электроныых деталей |
|
PC87413 датащи(PDF) 210 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87413 датащи(HTML) 210 Page - National Semiconductor (TI) |
|
210 / 257 page ![]() 9.0 System Wake-Up Control (SWC) (Continued) www.national.com 210 Revision1.2 9.4.10 General-Purpose Status 1 Register 2 (GPE1_STS_2) This register contains bits 16-23 of the GPE1_STS register. This register belongs to the General-Purpose Event 1 Group of the ACPI fixed-feature space registers. The status bits behave according to the Sticky status bit definition (the bit is set by the HIGH level of the hardware signal and is only cleared by the software writing ‘1’ to it) in the ACPI Specification. Power Well:VSB Location: Offset 02h Type: R/W1C Bit Description 7 GPIOE47_STS (GPIOE47 Event Status). Indicates that an active event has been detected at pin 7 of the GPIOE Port 4. The event has programmable polarity and the debounce option (see Section 7.3.1 on page 137). The bit is set by an active level at the GPIOE47 pin. Writing ‘1’ clears this bit; writing ‘0’ is ignored. 0: Inactive since last cleared (default) 1: An active event has occurred 6-0 GPIOE46_STS to GPIOE40_STS (GPIOE46 to GPIOE40 Event Status). Same as above for pins 6-0 of the GPIOE Port 4. Bit 76543210 Name PWBT_EVT _STS SLBT_EVT _STS KBD_EVT3 _STS KBD_EVT2 _STS KBD_EVT1 _STS MS_EVT _STS RI2_EVT _STS RI1_EVT _STS Reset 00000000 Bit Description 7 PWBT_EVT_STS (Power Button Event Status). Indicates that the Power button was pressed. This bit is similar to the PWRBTN_STS bit in the PM1b_STS_HIGH register. The PWBTIN signal is internally debounced. Writing ‘1’ clears this bit and the PWRBTN_STS bit in the PM1b_STS_HIGH register; writing ‘0’ is ignored. This bit is also cleared in Legacy Power Button mode (LEGACY_PWBT = 1 in PWONCTL) when VDD is turned off by pressing the Power button. 0: Inactive (default) 1: The Power button was pressed 6 SLBT_EVT_STS (Sleep Button Event Status). Indicates that the Sleep button was pressed. This bit is similar to the SLPBTN_STS bit in the PM1b_STS_HIGH register. The SLBTIN signal is internally debounced. Writing ‘1’ clears this bit and the SLPBTN_STS bit in the PM1b_STS_HIGH register; writing ‘0’ is ignored. 0: Inactive (default) 1: The Sleep button was pressed 5 KBD_EVT3_STS (Keyboard Event 3 Status). Indicates that “PM Key 3” was pressed and that the event was identified by the Keyboard/Mouse Wake-up Detector. This bit is set only if the Keyboard/Mouse Wake-up Detector is in the Power Management Key mode (see Section 9.3.16 on page 193). Writing ‘1’ clears this bit; writing ‘0’ is ignored. 0: Inactive since last cleared (default) 1: The “PM Key 3” key was pressed on the keyboard 4 KBD_EVT2_STS (Keyboard Event 2 Status). Indicates that “PM Key 2” was pressed and that the event was identified by the Keyboard/Mouse Wake-up Detector. This bit is set only if the Keyboard/Mouse Wake-up Detector is in the Power Management Key mode (see Section 9.3.16 on page 193). Writing ‘1’ clears this bit; writing ‘0’ is ignored. 0: Inactive since last cleared (default) 1: The “PM Key 2” key was pressed on the keyboard |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |