ADuC7023BCBZ62I-R7 datasheet(17/96 Pages) AD

17 / 96 page

Data Sheet

ADuC7023

| Page 17 of 96

Pin No.

40-

LFCSP

32-

LFCSP

36-

WLCSP

Mnemonic

Description

P1.3/ADC5/IRQ3/PLAI[4]

General-Purpose Input and Output Port 1.3/ADC Single-Ended or

Differential Analog Input 5/External Interrupt Request 3/ Programmable

Logic Array Input Element 4.

By default, this pin is configured as a digital input with a weak pull-up

resistor enabled. When used as ADC input, the pull-up resistor should be

disabled manually.

P1.2/ADC4/IRQ2/PLAI[3]/ECLK/

General-Purpose Input and Output Port 1.2/ADC Single-Ended or

Differential Analog Input 4/External Interrupt Request 2/ Programmable

Logic Array Input Element 3/Input-Output for External Clock.

By default, this pin is configured as a digital input with a weak pull-up

resistor enabled. When used as ADC input, the pull-up resistor should be

disabled manually.

P1.1/SS/IRQ1/PWM1/PLAO[2]/T1

General-Purpose Input and Output Port 1.1/SPI Interface Slave Select

(Active Low)/External Interrupt Request 1/PWM Output 1/ Programmable

Logic Array Output Element 2/Timer 1 Input Clock. By default, this pin is

configured as a digital input with a weak pull-up resistor enabled.

P1.0/SCLK/PWM0/PLAO[1]

General-Purpose Input and Output Port 1.0/SPI Interface Clock Signal/

PWM Output 0/Programmable Logic Array Output Element 1. By default,

this pin is configured as a digital input with a weak pull-up resistor

enabled.

VREF

2.5 V Internal Voltage Reference. Must be connected to a 0.47 µF capacitor

when using the internal reference.

AGND

Analog Ground. Ground reference point for the analog circuitry.

AVDD

3.3 V Analog Power.

Rev. E

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