ADuC7023BCBZ62I-R7 datasheet(29/96 Pages) AD

29 / 96 page

Data Sheet

ADuC7023

| Page 29 of 96

ADC CIRCUIT OVERVIEW

The analog-to-digital converter (ADC) incorporates a fast,

multichannel, 12-bit ADC. It can operate from 2.7 V to 3.6 V

supplies and is capable of providing a throughput of up to

1 MSPS when the clock source is 41.78 MHz. This block

provides the user with a multichannel multiplexer, a differential

track-and-hold, an on-chip reference, and an ADC.

The ADC consists of a 12-bit successive approximation

converter based around two capacitor DACs. Depending on the

input signal configuration, the ADC can operate in one of two

different modes: fully differential mode (for small and balanced

signals) or single-ended mode (for any single-ended signals).

The converter accepts an analog input range of 0 V to VREF when

operating in single-ended mode. In fully differential mode, the

input signal must be balanced around a common-mode voltage

(VCM) in the 0 V to AVDD range with a maximum amplitude of

2 VREF (see Figure 19).

AVDD

VCM

2VREF

Figure 19. Examples of Balanced Signals in Fully Differential Mode

A high precision, low drift, factory calibrated, 2.5 V reference is

provided on chip. An external reference can also be connected as

described later in the Band Gap Reference section.

Single or continuous conversion modes can be initiated in the

software. An external CONVSTART pin, an output generated from

the on-chip PLA, or a Timer0 or Timer1 overflow can also be

used to generate a repetitive trigger for ADC conversions.

A voltage output from an on-chip band gap reference propor-

tional to absolute temperature can also be routed through the

front-end ADC multiplexer. This temperature channel can be

selected as an ADC input. This facilitates an internal temperature

sensor channel that measures die temperature.

TRANSFER FUNCTION

Single-Ended Mode

In single-ended mode, the input range is 0 V to VREF. The

output coding is straight binary in single-ended mode with

1 LSB = FS/4096, or

2.5 V/4096 = 0.61 mV, or

610 μV when VREF = 2.5 V

The ideal code transitions occur midway between successive

integer LSB values (that is, 1/2 LSB, 3/2 LSB, 5/2 LSB, … ,

FS − 3/2 LSB). The ideal input/output transfer characteristic

is shown in Figure 20.

VOLTAGE INPUT

1111 1111 1111

1111 1111 1110

1111 1111 1101

1111 1111 1100

0000 0000 0011

1LSB

+FS – 1LSB

0000 0000 0010

0000 0000 0001

0000 0000 0000

1LSB =

4096

Figure 20. ADC Transfer Function in Single-Ended Mode

Fully Differential Mode

The amplitude of the differential signal is the difference between

the signals applied to the VIN+ and VIN– pins (that is, VIN+ −

VIN−). The maximum amplitude of the differential signal is,

therefore, −VREF to +VREF p-p (that is, 2 × VREF). This is regardless of

the common mode (CM). The common mode is the average of

the two signals, for example, (VIN+ + VIN–)/2, and is, therefore,

the voltage on which the two inputs are centered. This results in

the span of each input being CM ±VREF/2. This voltage has to be

set up externally, and its range varies with VREF (see the Driving

the Analog Inputs section).

The output coding is twos complement in fully differential mode

with 1 LSB = 2 VREF/4096 or 2 × 2.5 V/4096 = 1.22 mV when

VREF = 2.5 V. The output result is ±11 bits, but this is shifted by

one to the right. This allows the result in the ADCDAT MMR to

be declared as a signed integer when writing C code. The

designed code transitions occur midway between successive

integer LSB values (that is, 1/2 LSB, 3/2 LSB, 5/2 LSB, … , FS −

3/2 LSB). The ideal input/output transfer characteristic is shown

in Figure 21.

VOLTAGE INPUT (VIN+ – VIN–)

0 1111 1111 1110

0 1111 1111 1100

0 1111 1111 1010

0 0000 0000 0010

0 0000 0000 0000

1 1111 1111 1110

1 0000 0000 0100

1 0000 0000 0010

1 0000 0000 0000

–VREF + 1LSB

+VREF – 1LSB

0LSB

1LSB =

2 × VREF

4096

SIGN

BIT

Figure 21. ADC Transfer Function in Differential Mode

Rev. E

ADuC7023BCBZ62I-R7 датащи(PDF) 29 Page - Analog Devices

ADuC7023BCBZ62I-R7 датащи(HTML) 29 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

датащи скачать

ссылки URL