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ADuC7023BCBZ62I-R7 датащи(PDF) 31 Page - Analog Devices |
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ADuC7023BCBZ62I-R7 датащи(HTML) 31 Page - Analog Devices |
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31 / 96 page ![]() Data Sheet ADuC7023 | Page 31 of 96 Bit Value Description 7 Enable start conversion. This bit is set by the user to start any type of conversion command. This bit is cleared by the user to disable a start conversion (clearing this bit does not stop the ADC when continuously converting). 6 Reserved 5 ADC power control. This bit is set by the user to place the ADC in normal mode (the ADC must be powered up for at least 5 μs before it converts correctly). This bit is cleared by the user to place the ADC in power-down mode. 4 to 3 Conversion mode. 00 Single-ended mode. 01 Differential mode. 10 Reserved. 11 Reserved. 2 to 0 Conversion type. 000 Enable CONVSTART pin as a conversion input. 001 Enable Timer1 as a conversion input. 010 Enable Timer0 as a conversion input. 011 Single software conversion. This bit is set to 000 after conversion (note that Bit 13 of the ADCCON MMR should be set before starting a single software conversion to avoid further conversions triggered by the CONVSTART pin). 100 Continuous software conversion. 101 PLA conversion. Other Reserved. ADCCP Register Name: ADCCP Address: 0xFFFF0504 Default value: 0x00 Access: Read/write Function: ADCCP is an ADC positive channel selection register. This MMR is described in Table 25. Table 25. ADCCP MMR Bit Designation Bit Value Description 7 to 5 Reserved. 4 to 0 Positive channel selection bits. 00000 ADC0. 00001 ADC1. 00010 ADC2. 00011 ADC3. 00100 ADC41. 00101 ADC51. 00110 ADC61. 00111 ADC71. 01000 ADC81. 01001 ADC91. 01010 ADC101. 01011 Reserved. 01100 ADC121. 01101 Reserved 01110 DAC0 01111 DAC1 10000 Temperature sensor. 10001 AGND (self-diagnostic feature). 10010 Internal reference (self-diagnostic feature). 10011 AVDD/2. Others Reserved. 1 When a selected ADC channel is shared with one GPIO, by default, this pin is configured with a weak pull-up resistor enabled. The pull-up resistor should be disabled manually in the appropriate GPxPAR register. Note the internal pull-up resistor on P2.0/AIN12 for 40-lead package cannot be disabled. Rev. E |
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