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PIC18F23K22-E/ML датащи(PDF) 140 Page - Microchip Technology

номер детали PIC18F23K22-E/ML
подробное описание детали  28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PDF  496 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K22-E/ML датащи(HTML) 140 Page - Microchip Technology

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PIC18(L)F2X/4XK22
DS41412C-page 140
Preliminary
 2010 Microchip Technology Inc.
RB2/INT2/CTED1/
P1B/SDI2/SDA2/
AN8
RB2
01
O
DIG
LATB<2> data output; not affected by analog input.
10
I
ST
PORTB<2> data input; disabled when analog input
enabled.
INT2
10
I
ST
External interrupt 2.
CTED1
10
I
ST
CTMU Edge 1 input.
P1B(3)
01
O
DIG
Enhanced CCP1 PWM output 2.
SDI2(3)
10
I
ST
MSSP2 SPI data input.
SDA2(3)
00
ODIG
MSSP2 I2CTM data output.
10
II2C
MSSP2 I2CTM data input.
AN8
11
I
AN
Analog input 8.
RB3/CTED2/P2A/
CCP2/SDO2/
C12IN2-/AN9
RB3
01
O
DIG
LATB<3> data output; not affected by analog input.
10
I
ST
PORTB<3> data input; disabled when analog input
enabled.
CTED2
10
I
ST
CTMU Edge 2 input.
P2A
01
O
DIG
Enhanced CCP1 PWM output 1.
CCP2(2)
01
O
DIG
Compare 2 output/PWM 2 output.
10
I
ST
Capture 2 input.
SDO2(2)
01
O
DIG
MSSP2 SPI data output.
C12IN2-
11
I
AN
Comparators C1 and C2 inverting input.
AN9
11
I
AN
Analog input 9.
RB4/IOC0/P1D/
T5G/AN11
RB4
01
O
DIG
LATB<4> data output; not affected by analog input.
10
I
ST
PORTB<4> data input; disabled when analog input
enabled.
IOC0
10
I
TTL
Interrupt-on-change pin.
P1D
01
O
DIG
Enhanced CCP1 PWM output 4.
T5G
10
I
ST
Timer5 external clock gate input.
AN11
11
I
AN
Analog input 11.
RB5/IOC1/P2B/
P3A/CCP3/T3CKI/
T1G/AN13
RB5
01
O
DIG
LATB<5> data output; not affected by analog input.
10
I
ST
PORTB<5> data input; disabled when analog input
enabled.
IOC1
10
I
TTL
Interrupt-on-change pin 1.
P2B(1)(3)
01
O
DIG
Enhanced CCP2 PWM output 2.
P3A(1)
01
O
DIG
Enhanced CCP3 PWM output 1.
CCP3(1)
01
O
DIG
Compare 3 output/PWM 3 output.
10
I
ST
Capture 3 input.
T3CKI(2)
10
I
ST
Timer3 clock input.
T1G
10
I
ST
Timer1 external clock gate input.
AN13
11
I
AN
Analog input 13.
TABLE 10-5:
PORTB I/O SUMMARY (CONTINUED)
Pin
Function
TRIS
Setting
ANSEL
Setting
Pin
Type
Buffer
Type
Description
Legend:
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I2CTM
= Schmitt Trigger input with I2C.
Note 1:
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
2:
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
3:
Function on PORTD and PORTE for PIC18(L)F4XK22 devices.



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