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LPC2917/01 датащи(PDF) 53 Page - NXP Semiconductors

номер детали LPC2917/01
подробное описание детали  ARM9 microcontroller with CAN and LIN
PDF  86 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC2917/01 датащи(HTML) 53 Page - NXP Semiconductors

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LPC2917_19_01_2
© NXP B.V. 2009. All rights reserved.
Preliminary data sheet
Rev. 02 — 17 June 2009
53 of 86
NXP Semiconductors
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
6.15.4.2
Pin description
The RGU module in the LPC2917/2919/01 has the following pins. Table 30 shows the
RGU pins.
6.15.5 Power Management Unit (PMU)
This module enables software to actively control the system’s power consumption by
disabling clocks not required in a particular operating mode.
Table 29.
Reset output configuration
Reset output
Reset source
Parts of the device reset when activated
POR_RST
power-on reset module
LP_OSC; is source for RGU_RST
RGU_RST
POR_RST, RST pin
RGU internal; is source for PCR_RST
PCR_RST
RGU_RST, WATCHDOG
PCR internal; is source for COLD_RST
COLD_RST
PCR_RST
parts with COLD_RST as reset source below
WARM_RST
COLD_RST
parts with WARM_RST as reset source below
SCU_RST
COLD_RST
SCU
CFID_RST
COLD_RST
CFID
FMC_RST
COLD_RST
embedded Flash-Memory Controller (FMC)
EMC_RST
COLD_RST
embedded SRAM-Memory Controller
SMC_RST
COLD_RST
external Static-Memory Controller (SMC)
GESS_A2A_RST
WARM_RST
GeSS AHB-to-APB bridge
PESS_A2A_RST
WARM_RST
PeSS AHB-to-APB bridge
GPIO_RST
WARM_RST
all GPIO modules
UART_RST
WARM_RST
all UART modules
TMR_RST
WARM_RST
all Timer modules in PeSS
SPI_RST
WARM_RST
all SPI modules
IVNSS_A2A_RST
WARM_RST
IVNSS AHB-to-APB bridge
IVNSS_CAN_RST
WARM_RST
all CAN modules including Acceptance filter
IVNSS_LIN_RST
WARM_RST
all LIN modules
MSCSS_A2A_RST
WARM_RST
MSCSS AHB to APB bridge
MSCSS_PWM_RST
WARM_RST
all PWM modules
MSCSS_ADC_RST
WARM_RST
all ADC modules
MSCSS_TMR_RST
WARM_RST
all Timer modules in MSCSS
I2C_RST
WARM_RST
all I2C modules
QEI_RST
WARM_RST
Quadrature encoder
DMA_RST
WARM_RST
GPDMA controller
VIC_RST
WARM_RST
Vectored Interrupt Controller (VIC)
AHB_RST
WARM_RST
CPU and AHB Bus infrastructure
Table 30.
RGU pins
Symbol
Direction
Description
RST
IN
external reset input, Active LOW; pulled up internally



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