LPC2917SLASH01 datasheet(52/86 Pages) NXP

52 / 86 page

LPC2917_19_01_2

Preliminary data sheet

Rev. 02 — 17 June 2009

52 of 86

NXP Semiconductors

LPC2917/01; LPC2919/01

ARM9 microcontroller with CAN and LIN

6.15.3.1

Pin description

The CGU1 module in the LPC2917/2919/01 has the pins listed in Table 27 below.

6.15.4 Reset Generation Unit (RGU)

The RGU controls all internal resets.

The key features of the Reset Generation Unit (RGU) are:

• Reset controlled individually per subsystem

• Automatic reset stretching and release

• Monitor function to trace resets back to source

• Register write-protection mechanism to prevent unintentional resets

6.15.4.1

Functional description

Each reset output is deﬁned as a combination of reset input sources including the external

reset input pins and internal power-on reset, see Table 29. The ﬁrst ﬁve resets listed in this

table form a sort of cascade to provide the multiple levels of impact that a reset may have.

The combined input sources are logically OR-ed together so that activating any of the

listed reset sources causes the output to go active.

Fig 15. Block diagram of the CGU1

PLL

FDIV0

OUT

002aae266

clkout

clkout120

clkout240

CLOCK GENERATION UNIT

(CGU1)

AHB TO DTL BRIDGE

BASE_OUT_CLK

BASE_ICLK1_CLK

BASE_ICLK0_CLK

Table 28.

CGU1 pins

Symbol

Direction

Description

CLK_OUT

OUT

clock output

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