LPC2917SLASH01 datasheet(33/86 Pages) NXP

33 / 86 page

LPC2917_19_01_2

Preliminary data sheet

Rev. 02 — 17 June 2009

33 of 86

NXP Semiconductors

LPC2917/01; LPC2919/01

ARM9 microcontroller with CAN and LIN

6.12.5.3

Clock description

The SPI modules are clocked by two different clocks; CLK_SYS_PESS and CLK_SPIx

(x = 0, 1, 2), see Section 6.7.2. Note that each SPI has its own CLK_SPIx branch clock for

power management. The frequency of all clocks CLK_SPIx is identical as they are derived

from the same base clock BASE_CLK_SPI. The register interface towards the system bus

is clocked by CLK_SYS_PESS. The serial-clock rate divisor is clocked by CLK_SPIx.

The SPI clock frequency can be controlled by the CGU. In master mode the SPI clock

frequency (CLK_SPIx) must be set to at least twice the SPI serial clock rate on the

interface. In slave mode CLK_SPIx must be set to four times the SPI serial clock rate on

the interface.

6.12.6 General-purpose I/O

The LPC2917/2919/01 contains four general-purpose I/O ports located at different

peripheral base addresses. All I/O pins are bidirectional, and the direction can be

programmed individually. The I/O pad behavior depends on the conﬁguration programmed

in the port function-select registers.

The key features are:

• General-purpose parallel inputs and outputs

• Direction control of individual bits

• Synchronized input sampling for stable input-data values

• All I/O defaults to input at reset to avoid any possible bus conﬂicts

6.12.6.1

Functional description

The general-purpose I/O provides individual control over each bidirectional port pin. There

are two registers to control I/O direction and output level. The inputs are synchronized to

achieve stable read-levels.

To generate an open-drain output, set the bit in the output register to the desired value.

Use the direction register to control the signal. When set to output, the output driver

actively drives the value on the output: when set to input the signal ﬂoats and can be

pulled up internally or externally.

6.12.6.2

Pin description

The ﬁve GPIO ports in the LPC2917/2919/01 have the pins listed below. The GPIO pins

are combined with other functions on the port pins of the LPC2917/2919/01. Table 18

shows the GPIO pins.

Table 18.

GPIO pins

Symbol

Pin name

Direction

Description

GPIO0 pin[31:0]

P0[31:0]

IN/OUT

GPIO port x pins 31 to 0

GPIO1 pin[31:0]

P1[31:0]

IN/OUT

GPIO port x pins 31 to 0

GPIO2 pin[27:0]

P2[27:0]

IN/OUT

GPIO port x pins 27 to 0

GPIO3 pin[15:0]

P3[15:0]

IN/OUT

GPIO port x pins 15 to 0

LPC2917/01 датащи(PDF) 33 Page - NXP Semiconductors

LPC2917/01 датащи(HTML) 33 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86

датащи скачать

ссылки URL