LPC2917SLASH01 datasheet(47/86 Pages) NXP

47 / 86 page

LPC2917_19_01_2

Preliminary data sheet

Rev. 02 — 17 June 2009

47 of 86

NXP Semiconductors

LPC2917/01; LPC2919/01

ARM9 microcontroller with CAN and LIN

6.15.2 Clock Generation Unit (CGU0)

The key features are:

• Generation of 11 base clocks, selectable from several embedded clock sources.

• Crystal oscillator with power-down.

• Control PLL with power-down.

• Very low-power ring oscillator, always on to provide a ‘safe clock’.

• Seven fractional clock dividers with L/D division.

• Individual source selector for each base clock, with glitch-free switching.

• Autonomous clock-activity detection on every clock source.

• Protection against switching to invalid or inactive clock sources.

• Embedded frequency counter.

• Register write-protection mechanism to prevent unintentional alteration of clocks.

Remark: Any clock-frequency adjustment has a direct impact on the timing of all on-board

peripherals.

6.15.2.1

Functional description

The clock generation unit provides 11 internal clock sources as described in Table 26.

[1]

Maximum frequency that guarantees stable operation of the LPC2917/2919/01.

[2]

Fixed to low-power oscillator.

Table 26.

CGU0 base clocks

Numbe

Name

Frequency

(MHz) [1]

Description

BASE_SAFE_CLK

0.4

base safe clock (always on)

BASE_SYS_CLK

125

base system clock

BASE_PCR_CLK

0.4 [2]

base PCR subsystem clock

BASE_IVNSS_CLK

125

base IVNSS subsystem clock

BASE_MSCSS_CLK

125

base MSCSS subsystem clock

BASE_UART_CLK

125

base UART clock

BASE_ICLK0_CLK

125

base internal clock 0, for CGU1

BASE_SPI_CLK

base SPI clock

BASE_TMR_CLK

125

base timers clock

BASE_ADC_CLK

4.5

base ADCs clock

reserved

BASE_ICLK1_CLK

125

base internal clock 1, for CGU1

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