LPC2917SLASH01 datasheet(17/86 Pages) NXP

номер детали	LPC2917/01

подробное описание детали	ARM9 microcontroller with CAN and LIN

PDF	86 Pages

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производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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17 / 86 page

LPC2917_19_01_2

Preliminary data sheet

Rev. 02 — 17 June 2009

17 of 86

NXP Semiconductors

LPC2917/01; LPC2919/01

ARM9 microcontroller with CAN and LIN

Two of the base clocks generated by the CGU0 are used as input into a second, dedicated

CGU (CGU1). The CGU1 uses its own PLL and fractional divider to generate the base

clock for an independent clock output.

Fig 4.

LPC2917/2919/01 block diagram, overview of clock areas

TIMER0/1 MTMR

PWM0/1/2/3

ADC1/2

QEI

modulation and sampling

control subsystem

BASE_MSCSS_CLK

branch

clocks

branch

clocks

BASE_ADC_CLK

BA SE_ICLK0_CLK

BASE_ICLK1_CLK

CAN0/1

GLOBAL

ACCEPTANCE

FILTER

LIN0/1

I2C0/1

networking subsystem

BASE_IVNSS_CLK

branch

clocks

branch

clock

RESET/CLOCK

GENERATION AND

POWER

MANAGEMENT

power control subsystem

BASE_PCR_CLK

branch

clock

GPIO0/1/2/3

TIMER 0/1/2/3

SPI0/1/2

UART0/1

WDT

BASE_SYS_CLK

CPU

AHB MULTILAYER MATRIX

VIC

GPDMA

FLASH/SRAM/SMC

general subsytem

peripheral subsystem

AHB TO APB BRIDGES

SYSTEM CONTROL

EVENT ROUTER

CFID

branch

clocks

BASE_SAFE_CLK

BASE_UART_CLK

BASE_SPI_CLK

BASE_TMR_CLK

002aad962

CGU0

CGU1

BASE_OUT_CLK

CLOCK

OUT

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