LPC2917SLASH01 datasheet(19/86 Pages) NXP

19 / 86 page

LPC2917_19_01_2

Preliminary data sheet

Rev. 02 — 17 June 2009

19 of 86

NXP Semiconductors

LPC2917/01; LPC2919/01

ARM9 microcontroller with CAN and LIN

[1]

This clock is always on (cannot be switched off for system safety reasons)

[2]

In the peripheral subsystem parts of the Timers, watchdog timer, SPI and UART have their own clock

source. See Section 6.12 for details.

[3]

In the Power Clock and Reset Control subsystem parts of the CGU, RGU, and PMU have their own clock

source. See Section 6.15 for details.

[4]

The clock should remain activated when system wake-up on timer or UART is required.

BASE_MSCSS_CLK

CLK_MSCSS_APB

APB side of the MSCSS

CLK_MSCSS_MTMR0

Timer 0 in the MSCSS

CLK_MSCSS_MTMR1

Timer 1 in the MSCSS

CLK_MSCSS_PWM0

PWM 0

CLK_MSCSS_PWM1

PWM 1

CLK_MSCSS_PWM2

PWM 2

CLK_MSCSS_PWM3

PWM 3

CLK_MSCSS_ADC1_APB APB side of ADC 1

CLK_MSCSS_ADC2_APB APB side of ADC 2

CLK_MSCSS_QEI

Quadrature encoder

BASE_UART_CLK

CLK_UART0

UART 0 interface clock

CLK_UART1

UART 1 interface clock

BASE_ICLK0_CLK

CGU1 input clock

BASE_SPI_CLK

CLK_SPI0

SPI 0 interface clock

CLK_SPI1

SPI 1 interface clock

CLK_SPI2

SPI 2 interface clock

BASE_TMR_CLK

CLK_TMR0

Timer 0 clock for counter part

CLK_TMR1

Timer 1 clock for counter part

CLK_TMR2

Timer 2 clock for counter part

CLK_TMR3

Timer 3 clock for counter part

BASE_ADC_CLK

CLK_ADC1

Control of ADC 1, capture

sample result

CLK_ADC2

Control of ADC 2, capture

sample result

reserved

BASE_ICLK1_CLK

CGU1 input clock

Table 8.

CGU1 base clock and branch clock overview

Base clock

Branch clock name

Parts of the device clocked by this

branch clock

BASE_OUT_CLK

CLK_OUT_CLK

clockout pin

Table 7.

CGU0 generated base clock and branch clock overview …continued

Base clock

Branch clock name

Parts of the device clocked

by this branch clock

Remark

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