SH7713 datasheet(133/904 Pages) RENESAS

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Section 3 DSP Operating Unit

Rev.1.50 Aug. 30, 2006 Page 93 of 860

REJ09B0288-0150

3.4

DSP Data Transfer Instructions

In DSP mode, data transfer instructions are added for the DSP unit registers. The newly added

instructions are classified into the following three groups.

1. Double data transfer instructions

The DSP unit is connected to the X memory and Y memory via the specific buses called X bus

and Y bus. By using the data transfer instructions using the X and Y buses, two data items can

be transferred between the DSP unit and X/Y memories simultaneously. These instructions are

called double data transfer instructions. These double data transfer instructions can be

described in combination with the DSP operation instructions to execute data transfer and data

operation in parallel,

2. Single data transfer instructions

The DSP unit is also connected to the L bus that is used by the CPU. The DSP registers other

than the DSR can access any logical addresses generated by the CPU. In this case, the single

data transfer instructions are used. The single data transfer instructions cannot be used in

combination with the DSP operation instructions and can access only one data item at a time.

3. System control instructions

Some of the DSP unit registers are handled as the CPU system registers. To control these

system registers, the system control registers are supported. The DSP registers are connected to

the CPU general registers via the data transfer bus (C bus).

In any DSP data transfer instructions, an address to be accessed is generated and output by the

CPU. For DSP data transfer instructions, some of the CPU general registers are used for address

generation and specific addressing modes are used.

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