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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SH7713 датащи(PDF) 87 Page - Renesas Technology Corp |
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SH7713 датащи(HTML) 87 Page - Renesas Technology Corp |
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87 / 904 page  Section 2 CPU Rev.1.50 Aug. 30, 2006 Page 47 of 860 REJ09B0288-0150 Addressing Mode Instruction Format Effective Address Calculation Method Calculation Formula Indexed GBR indirect @(R0, GBR) Effective address is sum of register GBR and R0 contents. GBR GBR + R0 R0 + GBR + R0 PC-relative with displacement @(disp:8, PC) Effective address is PC with 8-bit displacement disp added. After disp is zero-extended, it is multiplied by 2 (word) or 4 (longword), according to the operand size. With a longword operand, the lower 2 bits of PC are masked. PC PC + disp × 2 or PC & H'FFFFFFFC + disp × 4 H'FFFFFFFC + & × 2/4 disp (zero-extended) * *: With longword operand Word: PC + disp × 2 Longword: PC&H'FFFFFFFC + disp × 4 PC-relative disp:8 Effective address is PC with 8-bit displacement disp added after being sign- extended and multiplied by 2. PC × 2 disp (sign-extended) + PC + disp × 2 PC + disp × 2 disp:12 Effective address is PC with 12-bit displacement disp added after being sign- extended and multiplied by 2 PC × 2 disp (sign-extended) + PC + disp × 2 PC + disp × 2 |
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