SH7713 datasheet(99/904 Pages) RENESAS

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Section 2 CPU

Rev.1.50 Aug. 30, 2006 Page 59 of 860

REJ09B0288-0150

Instruction

Instruction Code

Operation

Privileged

Mode

Cycles

T Bit

0100nnnn00010000

Rn – 1

→ Rn, if Rn = 0, 1 → T,

else 0

→ T



Comparison

result

EXTS.B

Rm,Rn

0110nnnnmmmm1110

A byte in Rm is sign-extended

→ Rn



EXTS.W

Rm,Rn

0110nnnnmmmm1111

A word in Rm is sign-extended

→ Rn



EXTU.B

Rm,Rn

0110nnnnmmmm1100

A byte in Rm is zero-extended

→ Rn



EXTU.W

Rm,Rn

0110nnnnmmmm1101

A word in Rm is zero-extended

→ Rn



MAC.L

@Rm+,

@Rn+

0000nnnnmmmm1111

Signed operation of (Rn)

(Rm)

+ MAC → MAC,Rn + 4

→ Rn, Rm + 4 → Rm,

× 32 + 64 → 64 bits



2 (to 5)*



MAC.W

@Rm+,

@Rn+

0100nnnnmmmm1111

Signed operation of (Rn)

(Rm)

+ MAC → MAC,Rn + 2

→ Rn, Rm + 2 → Rm,

× 16 + 64 → 64 bits



2 (to 5)*



MUL.L

Rm,Rn

0000nnnnmmmm0111

× Rm → MACL,

× 32 → 32 bits



2 (to 5)*



MULS.W

Rm,Rn

0010nnnnmmmm1111

Signed operation of Rn

× Rm

→ MACL,

× 16 → 32 bits



1( to 3)*



MULU.W

Rm,Rn

0010nnnnmmmm1110

Unsigned operation of

× Rm → MACL,

× 16 → 32 bits



1(to 3)*



NEG

Rm,Rn

0110nnnnmmmm1011

0–Rm

→Rn



NEGC

Rm,Rn

0110nnnnmmmm1010

0–Rm–T

→Rn, Borrow→T



Borrow

SUB

Rm,Rn

0011nnnnmmmm1000

Rn–Rm

→Rn



SUBC

Rm,Rn

0011nnnnmmmm1010

Rn–Rm–T

→Rn, Borrow →T



Borrow

SUBV

Rm,Rn

0011nnnnmmmm1011

Rn–Rm

→Rn, Underflow→T



Underflow

Note:

The number of execution cycles indicated within the parentheses ( ) are required when

the operation result is read from the MACH/MACL register immediately after the

instruction.

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