SH7713 datasheet(72/904 Pages) RENESAS

номер детали	SH7713

подробное описание детали	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

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производитель	RENESAS [Renesas Technology Corp]

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Section 2 CPU

Rev.1.50 Aug. 30, 2006 Page 32 of 860

REJ09B0288-0150

2.3

This LSI provides thirty-three 32-bit registers: 24 general registers, five control registers, three

system registers, and one program counter.

General Registers: This LSI incorporates 24 general registers: R0_BANK0 to R7_BANK0,

R0_BANK1 to R7_BANK1 and R8 to R15. R0 to R7 are banked. The process mode and the

to R7_BANK0 or R0_BANK1 to R7_BANK1) are accessed as general registers.

System Registers: This LSI incorporates the multiply and accumulate registers (MACH/MACL)

and procedure register (PR) as system registers. These registers can be accessed regardless of the

processing mode.

Program Counter: The program counter stores the value obtained by adding 4 to the current

instruction address.

Control Registers: This LSI incorporates the status register (SR), global base register (GBR),

save status register (SSR), save program counter (SPC), and vector base register as control

accessed only in privileged mode.

Table 2.2 shows the register values after reset. Figure 2.3 shows the register configurations in each

process mode.

SH7713 датащи(PDF) 72 Page - Renesas Technology Corp