SH7713 datasheet(36/904 Pages) RENESAS

36 / 904 page

Rev.1.50 Aug. 30, 2006 Page xxxvi of xl

Table 3.20

Examples of NOPX and NOPY Instruction Codes............................................... 116

Table 3.21

Variation of ALU Fixed-Point Operations............................................................ 119

Table 3.22

Correspondence between Operands and Registers ............................................... 119

Table 3.23

Variation of ALU Integer Operations ................................................................... 124

Table 3.24

Variation of ALU Logical Operations .................................................................. 125

Table 3.25

Variation of Fixed-Point Multiply Operation ....................................................... 127

Table 3.26

Correspondence between Operands and Registers ............................................... 127

Table 3.27

Variation of Shift Operations................................................................................ 128

Table 3.28

Operation Definition of PDMSB .......................................................................... 134

Table 3.29

Variation of PDMSB Operation............................................................................ 135

Table 3.30

Variation of Rounding Operation ......................................................................... 136

Table 3.31

Definition of Overflow Protection for Fixed-Point Arithmetic Operations .......... 137

Table 3.32

Definition of Overflow Protection for Integer Arithmetic Operations.................. 137

Table 3.33

Variation of Local Data Move Operations............................................................ 138

Table 3.34

Correspondence between Operands and Registers ............................................... 139

Table 3.35

DSP Mode Extended System Control Instructions ............................................... 140

Table 3.36

Double Data Transfer Instruction ......................................................................... 142

Table 3.37

Single Data Transfer Instructions ......................................................................... 143

Table 3.38

Correspondence between DSP Data Transfer Operands and Registers ................ 144

Table 3.39

DSP Operation Instructions .................................................................................. 145

Table 3.40

Operation Code Map............................................................................................. 151

Section 4 Exception Handling

Table 4.1

Exception Event Vectors ...................................................................................... 163

Table 4.2

Instruction Positions and Restriction Types.......................................................... 173

Table 4.3

SPC Value when Re-Execution Type Exception Occurs in

Repeat Control (RC[11:0]

≥ 2) ............................................................................. 176

Table 4.4

Exception Acceptance in Repeat Loop ................................................................. 177

Table 4.5

Instruction Where a Specific Exception Occurs when

Memory Access Exception Occurs in Repeat Control (SR.RC[11:0]

≥ 1) ........... 178

Section 5 Memory Management Unit (MMU)

Table 5.1

Access States Designated by D, C, and PR Bits ................................................... 199

Section 6 Cache

Table 6.1

LRU and Way Replacement (when Cache Locking Mechanism is Disabled)...... 216

Table 6.2

Way Replacement when a PREF Instruction Misses the Cache ........................... 220

Table 6.3

Way Replacement when Instructions other than the PREF Instruction

Miss the Cache...................................................................................................... 220

Table 6.4

LRU and Way Replacement (when W2LOCK = 1 and W3LOCK = 0)............... 220

Table 6.5

LRU and Way Replacement (when W2LOCK = 0 and W3LOCK = 1)............... 221

Table 6.6

LRU and Way Replacement (when W2LOCK = 1 and W3LOCK = 1)............... 221

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