SH7713 datasheet(15/904 Pages) RENESAS

15 / 904 page

Rev.1.50 Aug. 30, 2006 Page xv of xl

8.3

Interrupt Sources................................................................................................................ 237

8.3.1

NMI Interrupt........................................................................................................ 237

8.3.2

IRQ Interrupts ....................................................................................................... 238

8.3.3

IRL Interrupts ....................................................................................................... 238

8.3.4

On-Chip Peripheral Module Interrupts ................................................................. 239

8.3.5

Interrupt Exception Handling and Priority............................................................ 240

8.4

Register Descriptions ......................................................................................................... 246

8.4.1

Interrupt Priority Registers A to I (IPRA to IPRI) ................................................ 246

8.4.2

Interrupt Control Register 0 (ICR0)...................................................................... 248

8.4.3

Interrupt Control Register 1 (ICR1)...................................................................... 249

8.4.4

Interrupt Request Register 0 (IRR0) ..................................................................... 251

8.4.5

Interrupt Request Register 1 (IRR1) ..................................................................... 251

8.4.6

Interrupt Request Register 2 (IRR2) ..................................................................... 253

8.4.7

Interrupt Request Register 3 (IRR3) ..................................................................... 254

8.4.8

Interrupt Request Register 4 (IRR4) ..................................................................... 255

8.4.9

Interrupt Request Register 5 (IRR5) ..................................................................... 256

8.4.10 Interrupt Request Register 7 (IRR7) ..................................................................... 257

8.4.11 Interrupt Request Register 8 (IRR8) ..................................................................... 258

8.5

Operation ........................................................................................................................... 260

8.5.1

Interrupt Sequence ................................................................................................ 260

8.5.2

Multiple Interrupts ................................................................................................ 262

Section 9 User Break Controller ........................................................................263

9.1

Features.............................................................................................................................. 263

9.2

Register Descriptions ......................................................................................................... 266

9.2.1

Break Address Register A (BARA) ...................................................................... 266

9.2.2

Break Address Mask Register A (BAMRA)......................................................... 267

9.2.3

Break Bus Cycle Register A (BBRA)................................................................... 267

9.2.4

Break Address Register B (BARB) ...................................................................... 269

9.2.5

Break Address Mask Register B (BAMRB) ......................................................... 270

9.2.6

Break Data Register B (BDRB) ............................................................................ 270

9.2.7

Break Data Mask Register B (BDMRB)............................................................... 271

9.2.8

Break Bus Cycle Register B (BBRB) ................................................................... 272

9.2.9

Break Control Register (BRCR) ........................................................................... 274

9.2.10 Execution Times Break Register (BETR)............................................................. 278

9.2.11 Branch Source Register (BRSR)........................................................................... 279

9.2.12 Branch Destination Register (BRDR)................................................................... 280

9.2.13 Break ASID Register A (BASRA)........................................................................ 280

9.2.14 Break ASID Register B (BASRB) ........................................................................ 281

9.3

Operation ........................................................................................................................... 281

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