M16CSLASH1N datasheet(204/238 Pages) RENESAS

204 / 238 page

Rev.1.00

Oct 20, 2004

page 192 of 222

M16C/1N Group

19. Flash Memory Version

REJ09B0007-0100Z

Status

bit

SR4 (D4)

SR5 (D5)

SR7 (D7)

SR6 (D6)

Status name

Contents

SR1 (D1)

SR2 (D2)

SR3 (D3)

SR0 (D0)

Program status

Erase status

Sequencer status

Reserved

"1"

Ready

Terminated in error

"0"

Busy

Terminated normally

Reserved

FMR0

bit

Value

after

reset

FMR00

FMR07

FMR06

19.5.5 Status Register

The status register indicates the operating status of the flash memory and whether an erase or pro-

gramming operation terminated normally or in error. The status of the status register can be known by

reading the FMR0 register's FMR00, FMR06, and FMR07 bits.

Table 19.5 shows the status register.

In EW0 mode, the status register can be read in the following cases:

• When a given even address in the user ROM area is read after writing the Read Status Register

command

• When a given even address in the user ROM area is read after executing the program, or block erase

command but before executing the read array command.

(1) Sequencer status (SR7 and FMR00 bits )

The sequence status indicates the operating status of the flash memory. SR7 = 0 (busy) during auto

programming and auto erase is set to "1" (ready) at the same time the operation finishes.

(2) Erase status (SR5 and FMR07 bits)

Refer to 19.5.6 Full status check.

(3) Program status (SR4 and FMR06 bits)

Refer to 19.5.6 Full status check.

• The FMR07 bit (SR5) and FMR06 bit (SR4) are cleared to "0" by executing the clear status register

command.

• When the FMR07 bit (SR5) or FMR06 bit (SR4) = 1, the program, block and erase commands are not

accepted.

• D0-D7: Indicates the data bus which is read out when the read status register command is executed.

Table 19.5 Status register

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