M16CSLASH1N datasheet(68/238 Pages) RENESAS

68 / 238 page

Rev.1.00

Oct 20, 2004

page 56 of 222

M16C/1N Group

10. Interrupt

REJ09B0007-0100Z

Address

Content of previous stack

Stack area

[SP]

Stack pointer

value before

interrupt occurs

m - 1

m - 2

m - 3

m - 4

Stack status before interrupt request

is acknowledged

Stack status after interrupt request

is acknowledged

Content of previous stack

m + 1

MSB

LSB

m - 1

m - 2

m - 3

m - 4

Address

Flag register (FLGL)

Content of previous stack

Stack area

Flag register

(FLGH)

Program

counter (PCH)

[SP]

New stack

pointer value

Content of previous stack

m + 1

MSB

LSB

Program counter (PCL)

Program counter (PCM)

10.1.5.8 Saving Registers

In the interrupt sequence, only the contents of the flag register (FLG) and that of the program

counter (PC) are saved in the stack area.

First, the processor saves the 4 high-order bits of the program counter, and 4 high-order bits and 8

low-order bits of the FLG register, 16 bits in total, in the stack area, then saves 16 low-order bits of

the program counter. Figure 10.6 shows the state of the stack as it was before the acceptance of

the interrupt request, and the state the stack after the acceptance of the interrupt request.

Save other necessary registers at the beginning of the interrupt routine using software. Using the

PUSHM instruction alone can save all the registers except the stack pointer (SP).

Figure 10.6 State of stack before and after acceptance of interrupt request

Interrupt sources without priority levels

Watchdog timer

Reset

Other

Value set in the IPL

Not changed

10.1.5.7 Variation of IPL when Interrupt Request is Accepted

If an interrupt request is accepted, the interrupt priority level of the accepted interrupt is set in the IPL.

If an interrupt request, that does not have an interrupt priority level, is accepted, one of the values

shown in Table 10.6 is set in the IPL.

Table 10.6 Relationship between interrupts without interrupt priority levels and IPL

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