M16CSLASH1N datasheet(43/238 Pages) RENESAS

43 / 238 page

Rev.1.00

Oct 20, 2004

page 31 of 222

M16C/1N Group

6. Clock Generation Circuit

REJ09B0007-0100Z

6.5 Power Control

There are three power control modes. All modes other than wait and stop modes are referred to as

normal operation mode.

6.5.1 Normal Operating Modes

Normal operation mode is further separated into five modes.

In normal operation mode, the CPU clock and the peripheral function clock are supplied to operate the

CPU and the peripheral function.

Power consumption control is enabled by controlling the CPU clock frequency. The higher the CPU

clock frequency, the more processing power increases. The lower the CPU clock frequency, the more

power consumption decreased. When unnecessary oscillator circuits stop, power consumption is fur-

ther reduced.

Before the clock sources for the CPU clock can be switched over, the new clock source after switching

needs to be stabilized and oscillated. If the new clock source is the main clock, allow sufficient wait

time in a program until an oscillation is stabilized. When the clock source for the CPU clock is changed

from the one-chip oscillator to the main clock, change the operation mode to the medium-speed mode

(divided-by-8 mode) after the clock was divided by 8 in on-chip oscillator mode.

6.5.1.1 High-speed Mode

The main clock divided-by-1 (undivided) provides the CPU clock. The peripheral functions operate

on the clocks specified for each respective function.

6.5.1.2 Medium-speed Mode

The main clock divided-by-2, -4, -8 or -16 provides the CPU clock. The peripheral functions oper-

ated on the clocks specified for each respective function. The main clock must be oscillating stably

before transferring from the main clock divided-by-8 to divided-by-1, -2 or -4 and the sub-clock

must be oscillating stably before transferring to low-speed or lower power-dissipation mode.

6.5.1.3 Low-speed Mode

The sub-clock provides the CPU clock. The peripheral functions operate on the clocks specified for

each respective function. Note that oscillation of both the main and sub-clocks must have stabi-

lized before transferring from this mode to another or vice versa. At least 2 to 3 seconds are

required after the sub-clock status. Therefore, the program must be written to wait until this clock

has stabilized immediately after powering up and after stop mode is cancelled.

6.5.1.4 Low Power-dissipation Mode

In this mode, the main clock is turned off after being placed in low speed mode. The sub-clock

provides the CPU clock. Only the peripheral functions for which the sub-clock was selected as the

count source continue to operate.

6.5.1.5 On-chip Oscillator Mode

The on-chip oscillator clock divided-by-1(undivided) -2,-4,-8, or -16 provides the CPU clock. The

on-chip oscillator clock is also the clock source for the peripheral function clocks. The higher divi-

sion and the main clock is turned off after being placed in on-chip oscillator mode, power consump-

tion is reduced further.

Table 6.2 lists the setting and mode of clock associated bit.

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