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M16C/1N датащи(PDF) 36 Page - Renesas Technology Corp |
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M16C/1N датащи(HTML) 36 Page - Renesas Technology Corp |
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36 / 238 page ![]() Rev.1.00 Oct 20, 2004 page 24 of 222 M16C/1N Group 6. Clock Generation Circuit REJ09B0007-0100Z Sub clock CM0i : Bit i at address 000616 CM1i : Bit i at address 000716 CM2i : Bit i at address 000C16 WDCi : Bit i at address 000F16 CM10 "1" Write signal WAIT instruction Main clock Interrupt request level judgment output RESET Software reset Details of divider CM04 fC32 XCIN 1/32 XCOUT Q S R Q S R XOUT CM05 fC XIN 1/2 1/2 1/2 1/2 CM06=0 CM17, CM16=00 CM06=0 CM17, CM16=01 CM06=0 CM17, CM16=10 CM06=1 CM06=0 CM17, CM16=11 d a b 1/2 c CM20 Main clock switching circuit On-chip oscillator oscillation circuit Oscillation stop detection CM22 f1 By CCLK4, 5, 6 fC CM07=0 fAD fCAN0 a d f8 f32 c b BCLK CM07=1 CM02 1/2 fRING Divider Divider fMAIN Figure 6.1 Block diagram of clock generating circuit |
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