M16CSLASH1N datasheet(149/238 Pages) RENESAS

149 / 238 page

Rev.1.00

Oct 20, 2004

page 137 of 222

M16C/1N Group

16. CAN Module

REJ09B0007-0100Z

Figure 16.7 C0CTLR Register

16.4.2 C0CTLR Register

Figures 16.7 shows the C0CTLR register.

Reset

CAN module

reset bit

(Note 2)

LoopBack

Loop back mode

select bit

(Note 3)

MsgOrder

Message order

select bit

(Note 3)

BasicCAN

Basic CAN mode

select bit

(Note 3)

BusErrEn

Bus error interrupt

enable bit

(Note 3)

Sleep

Sleep mode

select bit (Note 3, 4)

PortEn

CAN port enable bit

(b7)

CAN0 control register

Symbol

Address

After reset

Symbol

Address

After reset

C0CTLR

X00000012

023016

(b15)

(b8)

0 : Operation mode

1 : Reset/initialization mode

0 : Word access

1 : Byte access

0 : Normal operation mode

1 : Basic CAN mode

0 : Normal operation mode

1 : Loop back mode

0 : Bus error interrupt disabled

1 : Bus error interrupt enabled

0 : Sleep mode disabled

1 : Sleep mode enabled; clock supply stopped

0 : I/O port function

1 : CTx/CRx function (Note 1)

Bit symbol

Bit name

Function

Bit symbol

Bit name

Function

Bit1, Bit0

TSReset

RXOnly

RetBusOff

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

XX0X00002

C0CTLR

023116

b1 b0

0 0 : Period of 1 bit time

0 1 : Period of 1/2 bit time

1 0 : Period of 1/4 bit time

1 1 : Period of 1/8 bit time

0 : Normal operation mode

1 : Force reset of the time stamp counter

0 : Normal operation mode

1 : Listen-only mode (Note 4)

0 : Normal operation mode

1 : Force return from bus off

Time stamp

prescaler (Note 3)

Time stamp counter

reset bit

(Note 1)

Return from bus off

command bit

(Note 2)

Listen-only mode

select bit (Note 3)

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

(b4)

(b7-b6)

Note 1: Irrespective of setting of PD0 and PD5 registers.

Note 2: When the Reset bit is set to "1" (CAN reset/initialization mode), check that the State_Reset bit of the C0STR register is set to "1" (Reset

mode).

Note 3: Set these bits only in CAN reset/initialization mode.

Note 4: When using CAN0 wake up interrupt, set this bit to "1" (Sleep mode disabled).

Note 1: When the TSReset bit = 1, the C0TSR register is set to "000016". After this, the bit is automatically set to "0".

Note 2: When the RetBusOff bit = 1, the C0RECR register and the C0TECR register are set to "0016". After this, the bit is automatically set to "0".

Note 3: Set these bits only in CAN reset/initialization mode.

Note 4: When listen-only mode is selected, do not request a transmission.

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