M16CSLASH1N datasheet(136/238 Pages) RENESAS

136 / 238 page

Rev.1.00

Oct 20, 2004

page 124 of 222

M16C/1N Group

14. A/D Converter

REJ09B0007-0100Z

Note 1: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.

Note 2: In repeat mode, only 8-bit mode can be used.

Note 3: When f(XIN) is over 10 MHz, the ﬂAD frequency must be under 10 MHz by dividing.

b5 b4

A/D control register 0 (Note 1)

CH0

Analog input pin select bit

A/D operation mode

select bit 0

0 : One-shot mode

1 : Repeat mode (Note 2)

ADGSEL0

A/D input group select bit

0 : Port P0 group is selected

1 : Port P1 group is selected

ADST

A/D conversion start flag

0 : A/D conversion disabled

1 : A/D conversion started

CKS0

Frequency select bit 0

0 : fAD/4 is selected

1 : fAD/2 is selected

CH1

CH2

Reserved bit

Set to "0"

Reserved bit

Set to "0"

Symbol

ADCON0

Address

00D616

When reset

00000XXX2

Function

Bit name

Bit symbol

b5 b4

A/D control register 1 (Note 1)

OPA0

OPA1

BITS

8/10-bit mode select bit

(Note 2)

0 : 8-bit mode

1 : 10-bit mode

CKS1

Frequency select bit 1

(Note 3)

0 : fAD/2 or fAD/4 is selected

1 : fAD is selected

VCUT

VREF connect bit

External op-amp

connection mode bit

0 : VREF not connected

1 : VREF connected

Symbol

ADCON1

Address

00D716

When reset

0016

Function

Bit name

Bit symbol

0 0 0 : AN0 is selected

0 0 1 : AN1 is selected

0 1 0 : AN2 is selected

0 1 1 : AN3 is selected

1 0 0 : AN4, AN8 are selected

1 0 1 : AN5, AN9 are selected

1 1 0 : AN6, AN10 are selected

1 1 1 : AN7, AN11 are selected (Note 2, 3)

b2 b1 b0

Note 1: If the A/D control register is rewritten during A/D conversion, the conversion result is indeterminate.

Note 2: When changing A/D operation mode, set analog input pin again.

Note 3: AN4 to AN7 and AN8 to AN11 are selected by the A/D input group select bit.

0 0 : ANEX0 and ANEX1 are not used

0 1 : ANEX0 input is A/D converted

1 0 : ANEX1 input is A/D converted

1 1 : External op-amp connection mode

b7 b6

Figure 14.2 A/D converter-related registers (1)

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