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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M16C/1N датащи(PDF) 133 Page - Renesas Technology Corp |
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M16C/1N датащи(HTML) 133 Page - Renesas Technology Corp |
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133 / 238 page  Rev.1.00 Oct 20, 2004 page 121 of 222 M16C/1N Group 13. Serial I/O REJ09B0007-0100Z • Example of receive timing when transfer data is 8 bits long (parity disabled, one stop bit) D0 Start bit Sampled "L" BRGi count source Receive enable bit RxDi Transfer clock Receive complete flag Stop bit "1" "0" "0" "1" The above timing applies to the following settings: Parity is disabled. One stop bit. Receive interrupt request bit "0" "1" Reception triggered when transfer clock is generated by falling edge of start bit Cleared to "0" when interrupt request is accepted, or cleared by software Receive data taken in Transferred from UARTi receive register to UARTi receive buffer register D7 D1 13.2.1 RxD1 Input pin Selection Function (UART1) This function allows the setting two RxD1 input pins and choosing one of the two to input serial data by using the RxD1 input pin select bit (bits 6 at address 00B016). When selecting "1" (P35) for RxD1 input pin select bit, P37 functions as TxD1 output pin. When select- ing "0" (P37), serial data output cannot be performed. However, P35 can be used as an input/output port. Figure 13.13 Typical receive timing in UART mode |
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