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DP83867CSRGZR.B датащи(PDF) 90 Page - Texas Instruments |
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DP83867CSRGZR.B датащи(HTML) 90 Page - Texas Instruments |
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90 / 129 page ![]() 7.6.68 Receive Pattern Register 3 (RXFPAT3) Table 7-78. Receive Pattern Register 3 (RXFPAT3), Address 0x013E BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_4_5 0, RW Bytes 4 + 5 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. 7.6.69 Receive Pattern Register 4 (RXFPAT4) Table 7-79. Receive Pattern Register 4 (RXFPAT4), Address 0x013F BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_6_7 0, RW Bytes 6 + 7 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. 7.6.70 Receive Pattern Register 5 (RXFPAT5) Table 7-80. Receive Pattern Register 5 (RXFPAT5), Address 0x0140 BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_8_9 0, RW Bytes 8 + 9 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. 7.6.71 Receive Pattern Register 6 (RXFPAT6) Table 7-81. Receive Pattern Register 6 (RXFPAT6), Address 0x0141 BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_10_11 0, RW Bytes 10 + 11 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. 7.6.72 Receive Pattern Register 7 (RXFPAT7) Table 7-82. Receive Pattern Register 7 (RXFPAT7), Address 0x0142 BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_12_13 0, RW Bytes 12 + 13 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. 7.6.73 Receive Pattern Register 8 (RXFPAT8) Table 7-83. Receive Pattern Register 8 (RXFPAT8), Address 0x0143 BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_14_15 0, RW Bytes 0 14 + 15 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. 7.6.74 Receive Pattern Register 9 (RXFPAT9) Table 7-84. Receive Pattern Register 9 (RXFPAT9), Address 0x0144 BIT BIT NAME DEFAULT DESCRIPTION 15:0 PATTERN_BYTES_16_17 0, RW. Bytes 16 + 17 of the configured pattern. Each byte can be masked separately through the RXF_PATTERN_BYTE_MASK registers. DP83867CS, DP83867IS, DP83867E SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025 www.ti.com 90 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867CS DP83867IS DP83867E |
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