DP83867CSRGZR.B datasheet(41/129 Pages) TI2

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Table 7-9. RGMII Receive Clock Skew Details

MODE

RGMII CLOCK SKEW

RX[2]

RGMII CLOCK SKEW

RX[1]

RGMII CLOCK SKEW

RX[0]

RGMII RX CLOCK SKEW

2.0ns

1.5ns

1.0ns

0.5ns

0ns

3.5ns

3.0ns

2.5ns

7.5.2 LED Configuration

The DP83867 supports four configurable Light Emitting Diode (LED) pins: LED_0, LED_1, and LED_2. A GPIO

pin can also be configured to operate as LED_3. Several functions can be multiplexed onto the LEDs for

different modes of operation. The LED operation mode can be selected using the LEDCR1 register (address

0x0018).

Because the LED output pins are also used as straps, the external components required for strapping and

LED usage must be considered to avoid contention. Specifically, when the LED outputs are used to drive LEDs

directly, the active state of each output driver is dependent on the logic level sampled by the corresponding AN

input upon power up or reset.

If a given strap input is resistively pulled low then the corresponding output is configured as an active high

driver. In the context of the 4-level straps, this occurs for modes 1, 2, and 3. Conversely, if a given strap input is

resistively pulled high, then the corresponding output is configured as an active low driver. In the context of the

4-level straps, this occurs only for mode 4.

Refer to Figure 7-11 for an example of strap connections to external components. In this example, the strapping

results in Mode 1 for LED_0 and Mode 4 for LED_1.

The adaptive nature of the LED outputs helps to simplify potential implementation issues of these dual purpose

pins.

VDD

470Ÿ

GND

Mode 4

Mode 1

Figure 7-11. Example Strap Connections

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DP83867CS, DP83867IS, DP83867E

SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025

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