ST72324BJ2 datasheet(47/188 Pages) STMICROELECTRONICS

номер детали	ST72324BJ2

подробное описание детали	8-bit MCU, 3.8 to 5.5 V operating range with 8 to 32 Kbyte Flash/ROM, 10-bit ADC, 4 timers, SPI, SCI

PDF	188 Pages

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производитель	STMICROELECTRONICS [STMicroelectronics]

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ST72324B

Power saving modes

47/188

Power saving modes

8.1

Introduction

To give a large measure of flexibility to the application in terms of power consumption, four

main power saving modes are implemented in the ST7 (see Figure 23): Slow, Wait (Slow

Wait), Active Halt and Halt.

After a reset the normal operating mode is selected by default (Run mode). This mode

drives the device (CPU and embedded peripherals) by means of a master clock which is

based on the main oscillator frequency divided or multiplied by 2 (fOSC2).

From Run mode, the different power saving modes may be selected by setting the relevant

oscillator status.

Figure 23.

Power saving mode transitions

8.2

Slow mode

This mode has two targets:

●

To reduce power consumption by decreasing the internal clock in the device,

●

To adapt the internal clock frequency (fCPU) to the available supply voltage.

Slow mode is controlled by three bits in the MCCSR register: the SMS bit which enables or

disables Slow mode and two CPx bits which select the internal slow frequency (fCPU).

In this mode, the master clock frequency (fOSC2) can be divided by 2, 4, 8 or 16. The CPU

and peripherals are clocked at this lower frequency (fCPU).

Note:

Slow-Wait mode is activated when entering the Wait mode while the device is already in

Slow mode.

Power consumption

Wait

Slow

Run

Active Halt

High

Low

Slow Wait

Halt

ST72324BJ2 датащи(PDF) 47 Page - STMicroelectronics